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📁 ..
📄 AArch64AddressingModes.h(26.68 KB)
📄 AArch64AsmBackend.cpp(29.94 KB)
📄 AArch64ELFObjectWriter.cpp(18.62 KB)
📄 AArch64ELFStreamer.cpp(7.53 KB)
📄 AArch64ELFStreamer.h(1.05 KB)
📄 AArch64FixupKinds.h(2.22 KB)
📄 AArch64InstPrinter.cpp(66.74 KB)
📄 AArch64InstPrinter.h(10.48 KB)
📄 AArch64MCAsmInfo.cpp(4.1 KB)
📄 AArch64MCAsmInfo.h(1.41 KB)
📄 AArch64MCCodeEmitter.cpp(26.35 KB)
📄 AArch64MCExpr.cpp(5.61 KB)
📄 AArch64MCExpr.h(6.36 KB)
📄 AArch64MCTargetDesc.cpp(18.02 KB)
📄 AArch64MCTargetDesc.h(3.01 KB)
📄 AArch64MachObjectWriter.cpp(14.96 KB)
📄 AArch64TargetStreamer.cpp(2.21 KB)
📄 AArch64TargetStreamer.h(4.37 KB)
📄 AArch64WinCOFFObjectWriter.cpp(5.11 KB)
📄 AArch64WinCOFFStreamer.cpp(7.07 KB)
📄 AArch64WinCOFFStreamer.h(1.02 KB)

Editing: AArch64FixupKinds.h

//===-- AArch64FixupKinds.h - AArch64 Specific Fixup Entries ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64FIXUPKINDS_H
#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64FIXUPKINDS_H

#include "llvm/MC/MCFixup.h"

namespace llvm {
namespace AArch64 {

enum Fixups {
  // A 21-bit pc-relative immediate inserted into an ADR instruction.
  fixup_aarch64_pcrel_adr_imm21 = FirstTargetFixupKind,

// A 21-bit pc-relative immediate inserted into an ADRP instruction.
  fixup_aarch64_pcrel_adrp_imm21,

// 12-bit fixup for add/sub instructions. No alignment adjustment. All value
  // bits are encoded.
  fixup_aarch64_add_imm12,

// unsigned 12-bit fixups for load and store instructions.
  fixup_aarch64_ldst_imm12_scale1,
  fixup_aarch64_ldst_imm12_scale2,
  fixup_aarch64_ldst_imm12_scale4,
  fixup_aarch64_ldst_imm12_scale8,
  fixup_aarch64_ldst_imm12_scale16,

// The high 19 bits of a 21-bit pc-relative immediate. Same encoding as
  // fixup_aarch64_pcrel_adrhi, except this is used by pc-relative loads and
  // generates relocations directly when necessary.
  fixup_aarch64_ldr_pcrel_imm19,

// FIXME: comment
  fixup_aarch64_movw,

// The high 14 bits of a 21-bit pc-relative immediate.
  fixup_aarch64_pcrel_branch14,

// The high 19 bits of a 21-bit pc-relative immediate. Same encoding as
  // fixup_aarch64_pcrel_adrhi, except this is use by b.cc and generates
  // relocations directly when necessary.
  fixup_aarch64_pcrel_branch19,

// The high 26 bits of a 28-bit pc-relative immediate.
  fixup_aarch64_pcrel_branch26,

// The high 26 bits of a 28-bit pc-relative immediate. Distinguished from
  // branch26 only on ELF.
  fixup_aarch64_pcrel_call26,

// zero-space placeholder for the ELF R_AARCH64_TLSDESC_CALL relocation.
  fixup_aarch64_tlsdesc_call,

// Marker
  LastTargetFixupKind,
  NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
};

} // end namespace AArch64
} // end namespace llvm

#endif

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Editing: AArch64FixupKinds.h

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