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usr / src / contrib / llvm-project / llvm / lib / Target / AMDGPU / MCTargetDesc /

📁 ..
📄 AMDGPUAsmBackend.cpp(7.72 KB)
📄 AMDGPUELFObjectWriter.cpp(3.54 KB)
📄 AMDGPUELFStreamer.cpp(1.33 KB)
📄 AMDGPUELFStreamer.h(1.2 KB)
📄 AMDGPUFixupKinds.h(799 B)
📄 AMDGPUInstPrinter.cpp(49.86 KB)
📄 AMDGPUInstPrinter.h(14.58 KB)
📄 AMDGPUMCAsmInfo.cpp(2.47 KB)
📄 AMDGPUMCAsmInfo.h(1.27 KB)
📄 AMDGPUMCCodeEmitter.cpp(641 B)
📄 AMDGPUMCCodeEmitter.h(2.84 KB)
📄 AMDGPUMCTargetDesc.cpp(6.28 KB)
📄 AMDGPUMCTargetDesc.h(2.7 KB)
📄 AMDGPUTargetStreamer.cpp(27.22 KB)
📄 AMDGPUTargetStreamer.h(6.45 KB)
📄 R600MCCodeEmitter.cpp(6.45 KB)
📄 R600MCTargetDesc.cpp(807 B)
📄 SIMCCodeEmitter.cpp(16.86 KB)

Editing: AMDGPUMCAsmInfo.cpp

//===-- MCTargetDesc/AMDGPUMCAsmInfo.cpp - Assembly Info ------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
/// \file
//===----------------------------------------------------------------------===//

#include "AMDGPUMCAsmInfo.h"
#include "llvm/ADT/Triple.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"

using namespace llvm;

AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT,
                                 const MCTargetOptions &Options)
    : MCAsmInfoELF() {
  CodePointerSize = (TT.getArch() == Triple::amdgcn) ? 8 : 4;
  StackGrowsUp = true;
  HasSingleParameterDotFile = false;
  //===------------------------------------------------------------------===//
  MinInstAlignment = 4;

// This is the maximum instruction encoded size for gfx10. With a known
  // subtarget, it can be reduced to 8 bytes.
  MaxInstLength = (TT.getArch() == Triple::amdgcn) ? 20 : 16;
  SeparatorString = "\n";
  CommentString = ";";
  PrivateLabelPrefix = "";
  InlineAsmStart = ";#ASMSTART";
  InlineAsmEnd = ";#ASMEND";

//===--- Data Emission Directives -------------------------------------===//
  SunStyleELFSectionSwitchSyntax = true;
  UsesELFSectionDirectiveForBSS = true;

//===--- Global Variable Emission Directives --------------------------===//
  HasAggressiveSymbolFolding = true;
  COMMDirectiveAlignmentIsInBytes = false;
  HasNoDeadStrip = true;
  WeakRefDirective = ".weakref\t";
  //===--- Dwarf Emission Directives -----------------------------------===//
  SupportsDebugInformation = true;
  DwarfRegNumForCFI = true;

UseIntegratedAssembler = false;
}

bool AMDGPUMCAsmInfo::shouldOmitSectionDirective(StringRef SectionName) const {
  return SectionName == ".hsatext" || SectionName == ".hsadata_global_agent" ||
         SectionName == ".hsadata_global_program" ||
         SectionName == ".hsarodata_readonly_agent" ||
         MCAsmInfo::shouldOmitSectionDirective(SectionName);
}

unsigned AMDGPUMCAsmInfo::getMaxInstLength(const MCSubtargetInfo *STI) const {
  if (!STI || STI->getTargetTriple().getArch() == Triple::r600)
    return MaxInstLength;

// Maximum for NSA encoded images
  if (STI->getFeatureBits()[AMDGPU::FeatureNSAEncoding])
    return 20;

// 64-bit instruction with 32-bit literal.
  if (STI->getFeatureBits()[AMDGPU::FeatureVOP3Literal])
    return 12;

return 8;
}

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Editing: AMDGPUMCAsmInfo.cpp

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