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📄 ARMAddressingModes.h(25.43 KB)
📄 ARMAsmBackend.cpp(48.4 KB)
📄 ARMAsmBackend.h(3.09 KB)
📄 ARMAsmBackendDarwin.h(1.35 KB)
📄 ARMAsmBackendELF.h(1008 B)
📄 ARMAsmBackendWinCOFF.h(912 B)
📄 ARMBaseInfo.h(13.92 KB)
📄 ARMELFObjectWriter.cpp(9.97 KB)
📄 ARMELFStreamer.cpp(49.31 KB)
📄 ARMFixupKinds.h(4.07 KB)
📄 ARMInstPrinter.cpp(57.09 KB)
📄 ARMInstPrinter.h(16.32 KB)
📄 ARMMCAsmInfo.cpp(3.33 KB)
📄 ARMMCAsmInfo.h(1.37 KB)
📄 ARMMCCodeEmitter.cpp(73.24 KB)
📄 ARMMCExpr.cpp(1.16 KB)
📄 ARMMCExpr.h(2.24 KB)
📄 ARMMCTargetDesc.cpp(13.95 KB)
📄 ARMMCTargetDesc.h(4.47 KB)
📄 ARMMachORelocationInfo.cpp(1.45 KB)
📄 ARMMachObjectWriter.cpp(19.16 KB)
📄 ARMTargetStreamer.cpp(12.38 KB)
📄 ARMUnwindOpAsm.cpp(6.86 KB)
📄 ARMUnwindOpAsm.h(2.45 KB)
📄 ARMWinCOFFObjectWriter.cpp(3.25 KB)
📄 ARMWinCOFFStreamer.cpp(1.63 KB)

Editing: ARMAsmBackend.h

//===-- ARMAsmBackend.h - ARM Assembler Backend -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
#define LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H

#include "MCTargetDesc/ARMFixupKinds.h"
#include "MCTargetDesc/ARMMCTargetDesc.h"
#include "llvm/MC/MCAsmBackend.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/TargetRegistry.h"

namespace llvm {

class ARMAsmBackend : public MCAsmBackend {
  // The STI from the target triple the MCAsmBackend was instantiated with
  // note that MCFragments may have a different local STI that should be
  // used in preference.
  const MCSubtargetInfo &STI;
  bool isThumbMode;    // Currently emitting Thumb code.
public:
  ARMAsmBackend(const Target &T, const MCSubtargetInfo &STI,
                support::endianness Endian)
      : MCAsmBackend(Endian), STI(STI),
        isThumbMode(STI.getTargetTriple().isThumb()) {}

unsigned getNumFixupKinds() const override {
    return ARM::NumTargetFixupKinds;
  }

// FIXME: this should be calculated per fragment as the STI may be
  // different.
  bool hasNOP() const { return STI.getFeatureBits()[ARM::HasV6T2Ops]; }

Optional<MCFixupKind> getFixupKind(StringRef Name) const override;

const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;

bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
                             const MCValue &Target) override;

unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,
                            const MCValue &Target, uint64_t Value,
                            bool IsResolved, MCContext &Ctx,
                            const MCSubtargetInfo *STI) const;

void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
                  const MCValue &Target, MutableArrayRef<char> Data,
                  uint64_t Value, bool IsResolved,
                  const MCSubtargetInfo *STI) const override;

unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const;

bool mayNeedRelaxation(const MCInst &Inst,
                         const MCSubtargetInfo &STI) const override;

const char *reasonForFixupRelaxation(const MCFixup &Fixup,
                                       uint64_t Value) const;

bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
                            const MCRelaxableFragment *DF,
                            const MCAsmLayout &Layout) const override;

void relaxInstruction(MCInst &Inst,
                        const MCSubtargetInfo &STI) const override;

bool writeNopData(raw_ostream &OS, uint64_t Count) const override;

void handleAssemblerFlag(MCAssemblerFlag Flag) override;

unsigned getPointerSize() const { return 4; }
  bool isThumb() const { return isThumbMode; }
  void setIsThumb(bool it) { isThumbMode = it; }
};
} // end namespace llvm

#endif

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Editing: ARMAsmBackend.h

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