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📁 ..
📄 A15SDOptimizer.cpp(24.01 KB)
📄 ARM.h(2.78 KB)
📄 ARM.td(73.6 KB)
📄 ARMAsmPrinter.cpp(80.17 KB)
📄 ARMAsmPrinter.h(5.74 KB)
📄 ARMBaseInstrInfo.cpp(209.03 KB)
📄 ARMBaseInstrInfo.h(36.07 KB)
📄 ARMBaseRegisterInfo.cpp(34.2 KB)
📄 ARMBaseRegisterInfo.h(7.84 KB)
📄 ARMBasicBlockInfo.cpp(5.18 KB)
📄 ARMBasicBlockInfo.h(5.25 KB)
📄 ARMCallLowering.cpp(19.74 KB)
📄 ARMCallLowering.h(1.89 KB)
📄 ARMCallingConv.cpp(11.8 KB)
📄 ARMCallingConv.h(2.43 KB)
📄 ARMCallingConv.td(14.63 KB)
📄 ARMConstantIslandPass.cpp(90.84 KB)
📄 ARMConstantPoolValue.cpp(11.53 KB)
📄 ARMConstantPoolValue.h(10.1 KB)
📄 ARMExpandPseudoInsts.cpp(115.56 KB)
📄 ARMFastISel.cpp(106.14 KB)
📄 ARMFeatures.h(2.48 KB)
📄 ARMFrameLowering.cpp(102.32 KB)
📄 ARMFrameLowering.h(4.02 KB)
📄 ARMHazardRecognizer.cpp(3.41 KB)
📄 ARMHazardRecognizer.h(1.54 KB)
📄 ARMISelDAGToDAG.cpp(206.42 KB)
📄 ARMISelLowering.cpp(728.6 KB)
📄 ARMISelLowering.h(38.98 KB)
📄 ARMInstrCDE.td(24.04 KB)
📄 ARMInstrFormats.td(93.92 KB)
📄 ARMInstrInfo.cpp(4.2 KB)
📄 ARMInstrInfo.h(1.49 KB)
📄 ARMInstrInfo.td(243.51 KB)
📄 ARMInstrMVE.td(299.67 KB)
📄 ARMInstrNEON.td(436.25 KB)
📄 ARMInstrThumb.td(65.92 KB)
📄 ARMInstrThumb2.td(211.06 KB)
📄 ARMInstrVFP.td(110.46 KB)
📄 ARMInstructionSelector.cpp(39.12 KB)
📄 ARMLegalizerInfo.cpp(18.8 KB)
📄 ARMLegalizerInfo.h(2.41 KB)
📄 ARMLoadStoreOptimizer.cpp(94.44 KB)
📄 ARMLowOverheadLoops.cpp(60.28 KB)
📄 ARMMCInstLower.cpp(7.2 KB)
📄 ARMMachineFunctionInfo.cpp(821 B)
📄 ARMMachineFunctionInfo.h(9.68 KB)
📄 ARMMacroFusion.cpp(2.36 KB)
📄 ARMMacroFusion.h(966 B)
📄 ARMOptimizeBarriersPass.cpp(3.43 KB)
📄 ARMParallelDSP.cpp(26.82 KB)
📄 ARMPerfectShuffle.h(382.02 KB)
📄 ARMPredicates.td(14.16 KB)
📄 ARMRegisterBankInfo.cpp(18.18 KB)
📄 ARMRegisterBankInfo.h(1.41 KB)
📄 ARMRegisterBanks.td(577 B)
📄 ARMRegisterInfo.cpp(685 B)
📄 ARMRegisterInfo.h(845 B)
📄 ARMRegisterInfo.td(24.53 KB)
📄 ARMSchedule.td(15.13 KB)
📄 ARMScheduleA57.td(62.61 KB)
📄 ARMScheduleA57WriteRes.td(11.43 KB)
📄 ARMScheduleA8.td(49.59 KB)
📄 ARMScheduleA9.td(130.35 KB)
📄 ARMScheduleM4.td(4.77 KB)
📄 ARMScheduleR52.td(44.27 KB)
📄 ARMScheduleSwift.td(50.53 KB)
📄 ARMScheduleV6.td(12.34 KB)
📄 ARMSelectionDAGInfo.cpp(9.21 KB)
📄 ARMSelectionDAGInfo.h(2.81 KB)
📄 ARMSubtarget.cpp(16.73 KB)
📄 ARMSubtarget.h(31.56 KB)
📄 ARMSystemRegister.td(5.42 KB)
📄 ARMTargetMachine.cpp(19.74 KB)
📄 ARMTargetMachine.h(3.48 KB)
📄 ARMTargetObjectFile.cpp(3.75 KB)
📄 ARMTargetObjectFile.h(1.67 KB)
📄 ARMTargetTransformInfo.cpp(63.49 KB)
📄 ARMTargetTransformInfo.h(10.22 KB)
📁 AsmParser
📁 Disassembler
📁 MCTargetDesc
📄 MLxExpansionPass.cpp(11.56 KB)
📄 MVEGatherScatterLowering.cpp(40.3 KB)
📄 MVETailPredication.cpp(23.2 KB)
📄 MVEVPTBlockPass.cpp(10.77 KB)
📄 MVEVPTOptimisationsPass.cpp(16.46 KB)
📁 TargetInfo
📄 Thumb1FrameLowering.cpp(39.45 KB)
📄 Thumb1FrameLowering.h(3.48 KB)
📄 Thumb1InstrInfo.cpp(5.73 KB)
📄 Thumb1InstrInfo.h(2.38 KB)
📄 Thumb2ITBlockPass.cpp(9.09 KB)
📄 Thumb2InstrInfo.cpp(26.43 KB)
📄 Thumb2InstrInfo.h(3.75 KB)
📄 Thumb2SizeReduction.cpp(40.25 KB)
📄 ThumbRegisterInfo.cpp(21.75 KB)
📄 ThumbRegisterInfo.h(2.44 KB)
📁 Utils

Editing: ARMBasicBlockInfo.cpp

//===--- ARMBasicBlockInfo.cpp - Utilities for block sizes ---------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#include "ARMBasicBlockInfo.h"
#include "ARM.h"
#include "ARMBaseInstrInfo.h"
#include "ARMMachineFunctionInfo.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/IR/GlobalVariable.h"
#include "llvm/Support/Debug.h"
#include <vector>

#define DEBUG_TYPE "arm-bb-utils"

using namespace llvm;

namespace llvm {

// mayOptimizeThumb2Instruction - Returns true if optimizeThumb2Instructions
// below may shrink MI.
static bool
mayOptimizeThumb2Instruction(const MachineInstr *MI) {
  switch(MI->getOpcode()) {
    // optimizeThumb2Instructions.
    case ARM::t2LEApcrel:
    case ARM::t2LDRpci:
    // optimizeThumb2Branches.
    case ARM::t2B:
    case ARM::t2Bcc:
    case ARM::tBcc:
    // optimizeThumb2JumpTables.
    case ARM::t2BR_JT:
    case ARM::tBR_JTr:
      return true;
  }
  return false;
}

void ARMBasicBlockUtils::computeBlockSize(MachineBasicBlock *MBB) {
  LLVM_DEBUG(dbgs() << "computeBlockSize: " << MBB->getName() << "\n");
  BasicBlockInfo &BBI = BBInfo[MBB->getNumber()];
  BBI.Size = 0;
  BBI.Unalign = 0;
  BBI.PostAlign = Align(1);

for (MachineInstr &I : *MBB) {
    BBI.Size += TII->getInstSizeInBytes(I);
    // For inline asm, getInstSizeInBytes returns a conservative estimate.
    // The actual size may be smaller, but still a multiple of the instr size.
    if (I.isInlineAsm())
      BBI.Unalign = isThumb ? 1 : 2;
    // Also consider instructions that may be shrunk later.
    else if (isThumb && mayOptimizeThumb2Instruction(&I))
      BBI.Unalign = 1;
  }

// tBR_JTr contains a .align 2 directive.
  if (!MBB->empty() && MBB->back().getOpcode() == ARM::tBR_JTr) {
    BBI.PostAlign = Align(4);
    MBB->getParent()->ensureAlignment(Align(4));
  }
}

/// getOffsetOf - Return the current offset of the specified machine instruction
/// from the start of the function.  This offset changes as stuff is moved
/// around inside the function.
unsigned ARMBasicBlockUtils::getOffsetOf(MachineInstr *MI) const {
  const MachineBasicBlock *MBB = MI->getParent();

// The offset is composed of two things: the sum of the sizes of all MBB's
  // before this instruction's block, and the offset from the start of the block
  // it is in.
  unsigned Offset = BBInfo[MBB->getNumber()].Offset;

// Sum instructions before MI in MBB.
  for (MachineBasicBlock::const_iterator I = MBB->begin(); &*I != MI; ++I) {
    assert(I != MBB->end() && "Didn't find MI in its own basic block?");
    Offset += TII->getInstSizeInBytes(*I);
  }
  return Offset;
}

/// isBBInRange - Returns true if the distance between specific MI and
/// specific BB can fit in MI's displacement field.
bool ARMBasicBlockUtils::isBBInRange(MachineInstr *MI,
                                     MachineBasicBlock *DestBB,
                                     unsigned MaxDisp) const {
  unsigned PCAdj      = isThumb ? 4 : 8;
  unsigned BrOffset   = getOffsetOf(MI) + PCAdj;
  unsigned DestOffset = BBInfo[DestBB->getNumber()].Offset;

LLVM_DEBUG(dbgs() << "Branch of destination " << printMBBReference(*DestBB)
                    << " from " << printMBBReference(*MI->getParent())
                    << " max delta=" << MaxDisp << " from " << getOffsetOf(MI)
                    << " to " << DestOffset << " offset "
                    << int(DestOffset - BrOffset) << "\t" << *MI);

if (BrOffset <= DestOffset) {
    // Branch before the Dest.
    if (DestOffset-BrOffset <= MaxDisp)
      return true;
  } else {
    if (BrOffset-DestOffset <= MaxDisp)
      return true;
  }
  return false;
}

void ARMBasicBlockUtils::adjustBBOffsetsAfter(MachineBasicBlock *BB) {
  assert(BB->getParent() == &MF &&
         "Basic block is not a child of the current function.\n");

unsigned BBNum = BB->getNumber();
  LLVM_DEBUG(dbgs() << "Adjust block:\n"
             << " - name: " << BB->getName() << "\n"
             << " - number: " << BB->getNumber() << "\n"
             << " - function: " << MF.getName() << "\n"
             << "   - blocks: " << MF.getNumBlockIDs() << "\n");

for(unsigned i = BBNum + 1, e = MF.getNumBlockIDs(); i < e; ++i) {
    // Get the offset and known bits at the end of the layout predecessor.
    // Include the alignment of the current block.
    const Align Align = MF.getBlockNumbered(i)->getAlignment();
    const unsigned Offset = BBInfo[i - 1].postOffset(Align);
    const unsigned KnownBits = BBInfo[i - 1].postKnownBits(Align);

// This is where block i begins.  Stop if the offset is already correct,
    // and we have updated 2 blocks.  This is the maximum number of blocks
    // changed before calling this function.
    if (i > BBNum + 2 &&
        BBInfo[i].Offset == Offset &&
        BBInfo[i].KnownBits == KnownBits)
      break;

BBInfo[i].Offset = Offset;
    BBInfo[i].KnownBits = KnownBits;
  }
}

} // end namespace llvm

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Editing: ARMBasicBlockInfo.cpp

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