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📁 ..
📄 A15SDOptimizer.cpp(24.01 KB)
📄 ARM.h(2.78 KB)
📄 ARM.td(73.6 KB)
📄 ARMAsmPrinter.cpp(80.17 KB)
📄 ARMAsmPrinter.h(5.74 KB)
📄 ARMBaseInstrInfo.cpp(209.03 KB)
📄 ARMBaseInstrInfo.h(36.07 KB)
📄 ARMBaseRegisterInfo.cpp(34.2 KB)
📄 ARMBaseRegisterInfo.h(7.84 KB)
📄 ARMBasicBlockInfo.cpp(5.18 KB)
📄 ARMBasicBlockInfo.h(5.25 KB)
📄 ARMCallLowering.cpp(19.74 KB)
📄 ARMCallLowering.h(1.89 KB)
📄 ARMCallingConv.cpp(11.8 KB)
📄 ARMCallingConv.h(2.43 KB)
📄 ARMCallingConv.td(14.63 KB)
📄 ARMConstantIslandPass.cpp(90.84 KB)
📄 ARMConstantPoolValue.cpp(11.53 KB)
📄 ARMConstantPoolValue.h(10.1 KB)
📄 ARMExpandPseudoInsts.cpp(115.56 KB)
📄 ARMFastISel.cpp(106.14 KB)
📄 ARMFeatures.h(2.48 KB)
📄 ARMFrameLowering.cpp(102.32 KB)
📄 ARMFrameLowering.h(4.02 KB)
📄 ARMHazardRecognizer.cpp(3.41 KB)
📄 ARMHazardRecognizer.h(1.54 KB)
📄 ARMISelDAGToDAG.cpp(206.42 KB)
📄 ARMISelLowering.cpp(728.6 KB)
📄 ARMISelLowering.h(38.98 KB)
📄 ARMInstrCDE.td(24.04 KB)
📄 ARMInstrFormats.td(93.92 KB)
📄 ARMInstrInfo.cpp(4.2 KB)
📄 ARMInstrInfo.h(1.49 KB)
📄 ARMInstrInfo.td(243.51 KB)
📄 ARMInstrMVE.td(299.67 KB)
📄 ARMInstrNEON.td(436.25 KB)
📄 ARMInstrThumb.td(65.92 KB)
📄 ARMInstrThumb2.td(211.06 KB)
📄 ARMInstrVFP.td(110.46 KB)
📄 ARMInstructionSelector.cpp(39.12 KB)
📄 ARMLegalizerInfo.cpp(18.8 KB)
📄 ARMLegalizerInfo.h(2.41 KB)
📄 ARMLoadStoreOptimizer.cpp(94.44 KB)
📄 ARMLowOverheadLoops.cpp(60.28 KB)
📄 ARMMCInstLower.cpp(7.2 KB)
📄 ARMMachineFunctionInfo.cpp(821 B)
📄 ARMMachineFunctionInfo.h(9.68 KB)
📄 ARMMacroFusion.cpp(2.36 KB)
📄 ARMMacroFusion.h(966 B)
📄 ARMOptimizeBarriersPass.cpp(3.43 KB)
📄 ARMParallelDSP.cpp(26.82 KB)
📄 ARMPerfectShuffle.h(382.02 KB)
📄 ARMPredicates.td(14.16 KB)
📄 ARMRegisterBankInfo.cpp(18.18 KB)
📄 ARMRegisterBankInfo.h(1.41 KB)
📄 ARMRegisterBanks.td(577 B)
📄 ARMRegisterInfo.cpp(685 B)
📄 ARMRegisterInfo.h(845 B)
📄 ARMRegisterInfo.td(24.53 KB)
📄 ARMSchedule.td(15.13 KB)
📄 ARMScheduleA57.td(62.61 KB)
📄 ARMScheduleA57WriteRes.td(11.43 KB)
📄 ARMScheduleA8.td(49.59 KB)
📄 ARMScheduleA9.td(130.35 KB)
📄 ARMScheduleM4.td(4.77 KB)
📄 ARMScheduleR52.td(44.27 KB)
📄 ARMScheduleSwift.td(50.53 KB)
📄 ARMScheduleV6.td(12.34 KB)
📄 ARMSelectionDAGInfo.cpp(9.21 KB)
📄 ARMSelectionDAGInfo.h(2.81 KB)
📄 ARMSubtarget.cpp(16.73 KB)
📄 ARMSubtarget.h(31.56 KB)
📄 ARMSystemRegister.td(5.42 KB)
📄 ARMTargetMachine.cpp(19.74 KB)
📄 ARMTargetMachine.h(3.48 KB)
📄 ARMTargetObjectFile.cpp(3.75 KB)
📄 ARMTargetObjectFile.h(1.67 KB)
📄 ARMTargetTransformInfo.cpp(63.49 KB)
📄 ARMTargetTransformInfo.h(10.22 KB)
📁 AsmParser
📁 Disassembler
📁 MCTargetDesc
📄 MLxExpansionPass.cpp(11.56 KB)
📄 MVEGatherScatterLowering.cpp(40.3 KB)
📄 MVETailPredication.cpp(23.2 KB)
📄 MVEVPTBlockPass.cpp(10.77 KB)
📄 MVEVPTOptimisationsPass.cpp(16.46 KB)
📁 TargetInfo
📄 Thumb1FrameLowering.cpp(39.45 KB)
📄 Thumb1FrameLowering.h(3.48 KB)
📄 Thumb1InstrInfo.cpp(5.73 KB)
📄 Thumb1InstrInfo.h(2.38 KB)
📄 Thumb2ITBlockPass.cpp(9.09 KB)
📄 Thumb2InstrInfo.cpp(26.43 KB)
📄 Thumb2InstrInfo.h(3.75 KB)
📄 Thumb2SizeReduction.cpp(40.25 KB)
📄 ThumbRegisterInfo.cpp(21.75 KB)
📄 ThumbRegisterInfo.h(2.44 KB)
📁 Utils

Editing: ARMFrameLowering.h

//===- ARMTargetFrameLowering.h - Define frame lowering for ARM -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_TARGET_ARM_ARMFRAMELOWERING_H
#define LLVM_LIB_TARGET_ARM_ARMFRAMELOWERING_H

#include "llvm/CodeGen/TargetFrameLowering.h"

namespace llvm {

class ARMSubtarget;
class CalleeSavedInfo;
class MachineFunction;

class ARMFrameLowering : public TargetFrameLowering {
protected:
  const ARMSubtarget &STI;

public:
  explicit ARMFrameLowering(const ARMSubtarget &sti);

/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
  /// the function.
  void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;

bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                                 MachineBasicBlock::iterator MI,
                                 ArrayRef<CalleeSavedInfo> CSI,
                                 const TargetRegisterInfo *TRI) const override;

bool
  restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
                              MachineBasicBlock::iterator MI,
                              MutableArrayRef<CalleeSavedInfo> CSI,
                              const TargetRegisterInfo *TRI) const override;

bool keepFramePointer(const MachineFunction &MF) const override;

bool enableCalleeSaveSkip(const MachineFunction &MF) const override;

bool hasFP(const MachineFunction &MF) const override;
  bool hasReservedCallFrame(const MachineFunction &MF) const override;
  bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override;
  int getFrameIndexReference(const MachineFunction &MF, int FI,
                             Register &FrameReg) const override;
  int ResolveFrameIndexReference(const MachineFunction &MF, int FI,
                                 Register &FrameReg, int SPAdj) const;

void getCalleeSaves(const MachineFunction &MF,
                      BitVector &SavedRegs) const override;
  void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
                            RegScavenger *RS) const override;

void adjustForSegmentedStacks(MachineFunction &MF,
                                MachineBasicBlock &MBB) const override;

/// Returns true if the target will correctly handle shrink wrapping.
  bool enableShrinkWrapping(const MachineFunction &MF) const override;

bool isProfitableForNoCSROpt(const Function &F) const override {
    // The no-CSR optimisation is bad for code size on ARM, because we can save
    // many registers with a single PUSH/POP pair.
    return false;
  }

bool
  assignCalleeSavedSpillSlots(MachineFunction &MF,
                              const TargetRegisterInfo *TRI,
                              std::vector<CalleeSavedInfo> &CSI) const override;

const SpillSlot *
  getCalleeSavedSpillSlots(unsigned &NumEntries) const override;

private:
  void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
                    ArrayRef<CalleeSavedInfo> CSI, unsigned StmOpc,
                    unsigned StrOpc, bool NoGap, bool (*Func)(unsigned, bool),
                    unsigned NumAlignedDPRCS2Regs, unsigned MIFlags = 0) const;
  void emitPopInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
                   MutableArrayRef<CalleeSavedInfo> CSI, unsigned LdmOpc,
                   unsigned LdrOpc, bool isVarArg, bool NoGap,
                   bool (*Func)(unsigned, bool),
                   unsigned NumAlignedDPRCS2Regs) const;

MachineBasicBlock::iterator
  eliminateCallFramePseudoInstr(MachineFunction &MF,
                                MachineBasicBlock &MBB,
                                MachineBasicBlock::iterator MI) const override;
};

} // end namespace llvm

#endif // LLVM_LIB_TARGET_ARM_ARMFRAMELOWERING_H

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Editing: ARMFrameLowering.h

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