File Manager

003 File Manager

Current Path: /usr/src/contrib/llvm-project/llvm/lib/Target/AVR

usr / src / contrib / llvm-project / llvm / lib / Target / AVR /

📁 ..
📄 AVR.h(1.73 KB)
📄 AVR.td(2.74 KB)
📄 AVRAsmPrinter.cpp(5.97 KB)
📄 AVRCallingConv.td(1.73 KB)
📄 AVRDevices.td(27.07 KB)
📄 AVRExpandPseudoInsts.cpp(49.61 KB)
📄 AVRFrameLowering.cpp(17.89 KB)
📄 AVRFrameLowering.h(1.91 KB)
📄 AVRISelDAGToDAG.cpp(16.71 KB)
📄 AVRISelLowering.cpp(67.66 KB)
📄 AVRISelLowering.h(6.98 KB)
📄 AVRInstrFormats.td(16.05 KB)
📄 AVRInstrInfo.cpp(16.86 KB)
📄 AVRInstrInfo.h(4.25 KB)
📄 AVRInstrInfo.td(66.4 KB)
📄 AVRMCInstLower.cpp(3.57 KB)
📄 AVRMCInstLower.h(1.08 KB)
📄 AVRMachineFunctionInfo.h(3.11 KB)
📄 AVRRegisterInfo.cpp(9.99 KB)
📄 AVRRegisterInfo.h(2.29 KB)
📄 AVRRegisterInfo.td(8.92 KB)
📄 AVRRelaxMemOperations.cpp(3.9 KB)
📄 AVRSelectionDAGInfo.h(868 B)
📄 AVRSubtarget.cpp(1.98 KB)
📄 AVRSubtarget.h(4.21 KB)
📄 AVRTargetMachine.cpp(3.86 KB)
📄 AVRTargetMachine.h(1.67 KB)
📄 AVRTargetObjectFile.cpp(1.4 KB)
📄 AVRTargetObjectFile.h(1019 B)
📁 AsmParser
📁 Disassembler
📁 MCTargetDesc
📄 README.md(341 B)
📄 TODO.md(186 B)
📁 TargetInfo

Editing: AVRRelaxMemOperations.cpp

//===-- AVRRelaxMemOperations.cpp - Relax out of range loads/stores -------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains a pass which relaxes out of range memory operations into
// equivalent operations which handle bigger addresses.
//
//===----------------------------------------------------------------------===//

#include "AVR.h"
#include "AVRInstrInfo.h"
#include "AVRTargetMachine.h"
#include "MCTargetDesc/AVRMCTargetDesc.h"

#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"

using namespace llvm;

#define AVR_RELAX_MEM_OPS_NAME "AVR memory operation relaxation pass"

namespace {

class AVRRelaxMem : public MachineFunctionPass {
public:
  static char ID;

AVRRelaxMem() : MachineFunctionPass(ID) {
    initializeAVRRelaxMemPass(*PassRegistry::getPassRegistry());
  }

bool runOnMachineFunction(MachineFunction &MF) override;

StringRef getPassName() const override { return AVR_RELAX_MEM_OPS_NAME; }

private:
  typedef MachineBasicBlock Block;
  typedef Block::iterator BlockIt;

const TargetInstrInfo *TII;

template <unsigned OP> bool relax(Block &MBB, BlockIt MBBI);

bool runOnBasicBlock(Block &MBB);
  bool runOnInstruction(Block &MBB, BlockIt MBBI);

MachineInstrBuilder buildMI(Block &MBB, BlockIt MBBI, unsigned Opcode) {
    return BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(Opcode));
  }
};

char AVRRelaxMem::ID = 0;

bool AVRRelaxMem::runOnMachineFunction(MachineFunction &MF) {
  bool Modified = false;

const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
  TII = STI.getInstrInfo();

for (Block &MBB : MF) {
    bool BlockModified = runOnBasicBlock(MBB);
    Modified |= BlockModified;
  }

return Modified;
}

bool AVRRelaxMem::runOnBasicBlock(Block &MBB) {
  bool Modified = false;

BlockIt MBBI = MBB.begin(), E = MBB.end();
  while (MBBI != E) {
    BlockIt NMBBI = std::next(MBBI);
    Modified |= runOnInstruction(MBB, MBBI);
    MBBI = NMBBI;
  }

return Modified;
}

template <>
bool AVRRelaxMem::relax<AVR::STDWPtrQRr>(Block &MBB, BlockIt MBBI) {
  MachineInstr &MI = *MBBI;

MachineOperand &Ptr = MI.getOperand(0);
  MachineOperand &Src = MI.getOperand(2);
  int64_t Imm = MI.getOperand(1).getImm();

// We can definitely optimise this better.
  if (Imm > 63) {
    // Push the previous state of the pointer register.
    // This instruction must preserve the value.
    buildMI(MBB, MBBI, AVR::PUSHWRr)
      .addReg(Ptr.getReg());

// Add the immediate to the pointer register.
    buildMI(MBB, MBBI, AVR::SBCIWRdK)
      .addReg(Ptr.getReg(), RegState::Define)
      .addReg(Ptr.getReg())
      .addImm(-Imm);

// Store the value in the source register to the address
    // pointed to by the pointer register.
    buildMI(MBB, MBBI, AVR::STWPtrRr)
      .addReg(Ptr.getReg())
      .addReg(Src.getReg(), getKillRegState(Src.isKill()));

// Pop the original state of the pointer register.
    buildMI(MBB, MBBI, AVR::POPWRd)
      .addReg(Ptr.getReg(), getKillRegState(Ptr.isKill()));

MI.removeFromParent();
  }

return false;
}

bool AVRRelaxMem::runOnInstruction(Block &MBB, BlockIt MBBI) {
  MachineInstr &MI = *MBBI;
  int Opcode = MBBI->getOpcode();

#define RELAX(Op)                \
  case Op:                       \
    return relax<Op>(MBB, MI)

switch (Opcode) {
    RELAX(AVR::STDWPtrQRr);
  }
#undef RELAX
  return false;
}

} // end of anonymous namespace

INITIALIZE_PASS(AVRRelaxMem, "avr-relax-mem",
                AVR_RELAX_MEM_OPS_NAME, false, false)

namespace llvm {

FunctionPass *createAVRRelaxMemPass() { return new AVRRelaxMem(); }

} // end of namespace llvm

003 File Manager

Editing: AVRRelaxMemOperations.cpp

Upload File

Create Folder