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AsmMatcherEmitter.cpp
(149.98 KB)
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AsmWriterEmitter.cpp
(46.29 KB)
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AsmWriterInst.cpp
(7.57 KB)
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AsmWriterInst.h
(3.83 KB)
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Attributes.cpp
(3.12 KB)
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CTagsEmitter.cpp
(2.52 KB)
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CallingConvEmitter.cpp
(11.74 KB)
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CodeEmitterGen.cpp
(22.5 KB)
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CodeGenDAGPatterns.cpp
(168.72 KB)
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CodeGenDAGPatterns.h
(47.85 KB)
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CodeGenHwModes.cpp
(3.45 KB)
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CodeGenHwModes.h
(1.84 KB)
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CodeGenInstruction.cpp
(30.97 KB)
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CodeGenInstruction.h
(13.7 KB)
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CodeGenIntrinsics.h
(6.6 KB)
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CodeGenMapTable.cpp
(23.38 KB)
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CodeGenRegisters.cpp
(90.68 KB)
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CodeGenRegisters.h
(29.9 KB)
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CodeGenSchedule.cpp
(84.92 KB)
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CodeGenSchedule.h
(23.14 KB)
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CodeGenTarget.cpp
(32.63 KB)
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CodeGenTarget.h
(7.22 KB)
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DAGISelEmitter.cpp
(6.92 KB)
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DAGISelMatcher.cpp
(13.53 KB)
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DAGISelMatcher.h
(37.72 KB)
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DAGISelMatcherEmitter.cpp
(37.44 KB)
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DAGISelMatcherGen.cpp
(44.06 KB)
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DAGISelMatcherOpt.cpp
(17.35 KB)
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DFAEmitter.cpp
(13.11 KB)
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DFAEmitter.h
(3.96 KB)
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DFAPacketizerEmitter.cpp
(13.02 KB)
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DirectiveEmitter.cpp
(20.15 KB)
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DisassemblerEmitter.cpp
(7.02 KB)
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ExegesisEmitter.cpp
(7.39 KB)
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FastISelEmitter.cpp
(30.83 KB)
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FixedLenDecoderEmitter.cpp
(90.04 KB)
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GICombinerEmitter.cpp
(40.12 KB)
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GlobalISel
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GlobalISelEmitter.cpp
(215.56 KB)
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InfoByHwMode.cpp
(6.69 KB)
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InfoByHwMode.h
(5.74 KB)
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InstrDocsEmitter.cpp
(7.05 KB)
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InstrInfoEmitter.cpp
(31.52 KB)
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IntrinsicEmitter.cpp
(32.87 KB)
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OptEmitter.cpp
(2.9 KB)
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OptEmitter.h
(575 B)
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OptParserEmitter.cpp
(15.16 KB)
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OptRSTEmitter.cpp
(2.71 KB)
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PredicateExpander.cpp
(17.39 KB)
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PredicateExpander.h
(5.19 KB)
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PseudoLoweringEmitter.cpp
(11.8 KB)
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RISCVCompressInstEmitter.cpp
(39.23 KB)
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RegisterBankEmitter.cpp
(12.52 KB)
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RegisterInfoEmitter.cpp
(61.32 KB)
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SDNodeProperties.cpp
(1.9 KB)
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SDNodeProperties.h
(985 B)
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SearchableTableEmitter.cpp
(26.81 KB)
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SequenceToOffsetTable.h
(8.49 KB)
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SubtargetEmitter.cpp
(70.77 KB)
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SubtargetFeatureInfo.cpp
(5.72 KB)
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SubtargetFeatureInfo.h
(4.05 KB)
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TableGen.cpp
(9.7 KB)
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TableGenBackends.h
(4.62 KB)
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Types.cpp
(1.46 KB)
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Types.h
(900 B)
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WebAssemblyDisassemblerEmitter.cpp
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WebAssemblyDisassemblerEmitter.h
(980 B)
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X86DisassemblerShared.h
(1.88 KB)
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X86DisassemblerTables.cpp
(42.64 KB)
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X86DisassemblerTables.h
(11.7 KB)
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X86EVEX2VEXTablesEmitter.cpp
(8.77 KB)
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X86FoldTablesEmitter.cpp
(26.09 KB)
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X86ModRMFilters.cpp
(636 B)
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X86ModRMFilters.h
(4.69 KB)
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X86RecognizableInstr.cpp
(47.05 KB)
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X86RecognizableInstr.h
(14.13 KB)
Editing: AsmWriterInst.h
//===- AsmWriterInst.h - Classes encapsulating a printable inst -*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // These classes implement a parser for assembly strings. The parser splits // the string into operands, which can be literal strings (the constant bits of // the string), actual operands (i.e., operands from the MachineInstr), and // dynamically-generated text, specified by raw C++ code. // //===----------------------------------------------------------------------===// #ifndef LLVM_UTILS_TABLEGEN_ASMWRITERINST_H #define LLVM_UTILS_TABLEGEN_ASMWRITERINST_H #include <string> #include <vector> namespace llvm { class CodeGenInstruction; class Record; struct AsmWriterOperand { enum OpType { // Output this text surrounded by quotes to the asm. isLiteralTextOperand, // This is the name of a routine to call to print the operand. isMachineInstrOperand, // Output this text verbatim to the asm writer. It is code that // will output some text to the asm. isLiteralStatementOperand } OperandType; /// MiOpNo - For isMachineInstrOperand, this is the operand number of the /// machine instruction. unsigned MIOpNo = 0; /// Str - For isLiteralTextOperand, this IS the literal text. For /// isMachineInstrOperand, this is the PrinterMethodName for the operand.. /// For isLiteralStatementOperand, this is the code to insert verbatim /// into the asm writer. std::string Str; /// MiModifier - For isMachineInstrOperand, this is the modifier string for /// an operand, specified with syntax like ${opname:modifier}. std::string MiModifier; bool PCRel = false; // To make VS STL happy AsmWriterOperand(OpType op = isLiteralTextOperand):OperandType(op) {} AsmWriterOperand(const std::string &LitStr, OpType op = isLiteralTextOperand) : OperandType(op), Str(LitStr) {} AsmWriterOperand(const std::string &Printer, unsigned _MIOpNo, const std::string &Modifier, OpType op = isMachineInstrOperand, bool PCRel = false) : OperandType(op), MIOpNo(_MIOpNo), Str(Printer), MiModifier(Modifier), PCRel(PCRel) {} bool operator!=(const AsmWriterOperand &Other) const { if (OperandType != Other.OperandType || Str != Other.Str) return true; if (OperandType == isMachineInstrOperand) return MIOpNo != Other.MIOpNo || MiModifier != Other.MiModifier; return false; } bool operator==(const AsmWriterOperand &Other) const { return !operator!=(Other); } /// getCode - Return the code that prints this operand. std::string getCode(bool PassSubtarget) const; }; class AsmWriterInst { public: std::vector<AsmWriterOperand> Operands; const CodeGenInstruction *CGI; unsigned CGIIndex; AsmWriterInst(const CodeGenInstruction &CGI, unsigned CGIIndex, unsigned Variant); /// MatchesAllButOneOp - If this instruction is exactly identical to the /// specified instruction except for one differing operand, return the /// differing operand number. Otherwise return ~0. unsigned MatchesAllButOneOp(const AsmWriterInst &Other) const; private: void AddLiteralString(const std::string &Str) { // If the last operand was already a literal text string, append this to // it, otherwise add a new operand. if (!Operands.empty() && Operands.back().OperandType == AsmWriterOperand::isLiteralTextOperand) Operands.back().Str.append(Str); else Operands.push_back(AsmWriterOperand(Str)); } }; } #endif
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