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AggressiveAntiDepBreaker.cpp
(37.23 KB)
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AggressiveAntiDepBreaker.h
(6.8 KB)
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AllocationOrder.cpp
(1.96 KB)
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AllocationOrder.h
(2.96 KB)
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Analysis.cpp
(32.62 KB)
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AsmPrinter
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AtomicExpandPass.cpp
(71.86 KB)
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BBSectionsPrepare.cpp
(18.8 KB)
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BasicTargetTransformInfo.cpp
(1.53 KB)
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BranchFolding.cpp
(77.92 KB)
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BranchFolding.h
(7.36 KB)
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BranchRelaxation.cpp
(19.45 KB)
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BreakFalseDeps.cpp
(9.79 KB)
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BuiltinGCs.cpp
(4.88 KB)
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CFGuardLongjmp.cpp
(3.73 KB)
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CFIInstrInserter.cpp
(17.53 KB)
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CalcSpillWeights.cpp
(10.22 KB)
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CallingConvLower.cpp
(10.4 KB)
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CodeGen.cpp
(5.28 KB)
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CodeGenPrepare.cpp
(295.01 KB)
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CommandFlags.cpp
(24.89 KB)
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CriticalAntiDepBreaker.cpp
(27.91 KB)
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CriticalAntiDepBreaker.h
(4.22 KB)
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DFAPacketizer.cpp
(10.91 KB)
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DeadMachineInstructionElim.cpp
(6.52 KB)
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DetectDeadLanes.cpp
(20.74 KB)
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DwarfEHPrepare.cpp
(9.01 KB)
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EarlyIfConversion.cpp
(37.51 KB)
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EdgeBundles.cpp
(3.21 KB)
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ExecutionDomainFix.cpp
(14.67 KB)
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ExpandMemCmp.cpp
(33.66 KB)
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ExpandPostRAPseudos.cpp
(7.28 KB)
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ExpandReductions.cpp
(7.23 KB)
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FEntryInserter.cpp
(1.81 KB)
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FaultMaps.cpp
(4.99 KB)
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FinalizeISel.cpp
(2.65 KB)
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FixupStatepointCallerSaved.cpp
(11.06 KB)
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FuncletLayout.cpp
(2.21 KB)
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GCMetadata.cpp
(5.1 KB)
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GCMetadataPrinter.cpp
(748 B)
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GCRootLowering.cpp
(11.46 KB)
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GCStrategy.cpp
(708 B)
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GlobalISel
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GlobalMerge.cpp
(24.52 KB)
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HardwareLoops.cpp
(18.44 KB)
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IfConversion.cpp
(89.43 KB)
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ImplicitNullChecks.cpp
(25.14 KB)
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IndirectBrExpandPass.cpp
(7.79 KB)
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InlineSpiller.cpp
(58.24 KB)
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InterferenceCache.cpp
(8.83 KB)
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InterferenceCache.h
(7.22 KB)
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InterleavedAccessPass.cpp
(16.59 KB)
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InterleavedLoadCombinePass.cpp
(42.35 KB)
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IntrinsicLowering.cpp
(17.08 KB)
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LLVMTargetMachine.cpp
(10.25 KB)
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LatencyPriorityQueue.cpp
(5.64 KB)
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LazyMachineBlockFrequencyInfo.cpp
(3.36 KB)
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LexicalScopes.cpp
(12.16 KB)
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LiveDebugValues.cpp
(78.98 KB)
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LiveDebugVariables.cpp
(51.79 KB)
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LiveDebugVariables.h
(2.15 KB)
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LiveInterval.cpp
(46.67 KB)
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LiveIntervalCalc.cpp
(7.62 KB)
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LiveIntervalUnion.cpp
(6.36 KB)
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LiveIntervals.cpp
(64.59 KB)
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LivePhysRegs.cpp
(11.08 KB)
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LiveRangeCalc.cpp
(15.72 KB)
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LiveRangeEdit.cpp
(17.03 KB)
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LiveRangeShrink.cpp
(8.69 KB)
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LiveRangeUtils.h
(2.12 KB)
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LiveRegMatrix.cpp
(7.47 KB)
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LiveRegUnits.cpp
(4.72 KB)
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LiveStacks.cpp
(2.95 KB)
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LiveVariables.cpp
(30.26 KB)
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LocalStackSlotAllocation.cpp
(17.26 KB)
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LoopTraversal.cpp
(2.89 KB)
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LowLevelType.cpp
(1.93 KB)
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LowerEmuTLS.cpp
(5.66 KB)
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MBFIWrapper.cpp
(1.57 KB)
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MIRCanonicalizerPass.cpp
(12.46 KB)
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MIRNamerPass.cpp
(2.16 KB)
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MIRParser
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MIRPrinter.cpp
(32.67 KB)
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MIRPrintingPass.cpp
(1.99 KB)
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MIRVRegNamerUtils.cpp
(6.04 KB)
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MIRVRegNamerUtils.h
(3.25 KB)
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MachineBasicBlock.cpp
(50.47 KB)
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MachineBlockFrequencyInfo.cpp
(10.13 KB)
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MachineBlockPlacement.cpp
(137.61 KB)
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MachineBranchProbabilityInfo.cpp
(3.5 KB)
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MachineCSE.cpp
(31.82 KB)
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MachineCombiner.cpp
(28.13 KB)
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MachineCopyPropagation.cpp
(29.21 KB)
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MachineDebugify.cpp
(6.47 KB)
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MachineDominanceFrontier.cpp
(1.83 KB)
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MachineDominators.cpp
(4.86 KB)
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MachineFrameInfo.cpp
(9.77 KB)
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MachineFunction.cpp
(42.97 KB)
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MachineFunctionPass.cpp
(4.78 KB)
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MachineFunctionPrinterPass.cpp
(2.3 KB)
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MachineInstr.cpp
(76.39 KB)
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MachineInstrBundle.cpp
(11.49 KB)
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MachineLICM.cpp
(57.05 KB)
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MachineLoopInfo.cpp
(4.98 KB)
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MachineLoopUtils.cpp
(5.16 KB)
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MachineModuleInfo.cpp
(9.9 KB)
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MachineModuleInfoImpls.cpp
(1.5 KB)
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MachineOperand.cpp
(39.6 KB)
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MachineOptimizationRemarkEmitter.cpp
(3.29 KB)
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MachineOutliner.cpp
(42.13 KB)
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MachinePipeliner.cpp
(111.33 KB)
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MachinePostDominators.cpp
(2.42 KB)
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MachineRegionInfo.cpp
(4.75 KB)
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MachineRegisterInfo.cpp
(22.97 KB)
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MachineSSAUpdater.cpp
(12.99 KB)
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MachineScheduler.cpp
(136.89 KB)
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MachineSink.cpp
(51.94 KB)
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MachineSizeOpts.cpp
(8.76 KB)
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MachineStripDebug.cpp
(3.76 KB)
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MachineTraceMetrics.cpp
(49.58 KB)
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MachineVerifier.cpp
(107.98 KB)
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MacroFusion.cpp
(7.55 KB)
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ModuloSchedule.cpp
(85.09 KB)
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NonRelocatableStringpool.cpp
(1.65 KB)
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OptimizePHIs.cpp
(6.7 KB)
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PHIElimination.cpp
(27.73 KB)
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PHIEliminationUtils.cpp
(2.56 KB)
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PHIEliminationUtils.h
(972 B)
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ParallelCG.cpp
(3.71 KB)
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PatchableFunction.cpp
(3.44 KB)
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PeepholeOptimizer.cpp
(78.41 KB)
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PostRAHazardRecognizer.cpp
(3.5 KB)
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PostRASchedulerList.cpp
(24.31 KB)
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PreISelIntrinsicLowering.cpp
(7.91 KB)
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ProcessImplicitDefs.cpp
(5.4 KB)
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PrologEpilogInserter.cpp
(50.45 KB)
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PseudoSourceValue.cpp
(4.71 KB)
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RDFGraph.cpp
(58.39 KB)
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RDFLiveness.cpp
(40.7 KB)
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RDFRegisters.cpp
(11.29 KB)
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ReachingDefAnalysis.cpp
(21.74 KB)
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RegAllocBase.cpp
(6.31 KB)
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RegAllocBase.h
(4.63 KB)
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RegAllocBasic.cpp
(11.33 KB)
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RegAllocFast.cpp
(45.78 KB)
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RegAllocGreedy.cpp
(123.32 KB)
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RegAllocPBQP.cpp
(33.14 KB)
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RegUsageInfoCollector.cpp
(7.39 KB)
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RegUsageInfoPropagate.cpp
(5.07 KB)
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RegisterClassInfo.cpp
(6.62 KB)
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RegisterCoalescer.cpp
(151.71 KB)
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RegisterCoalescer.h
(4.04 KB)
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RegisterPressure.cpp
(48.86 KB)
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RegisterScavenging.cpp
(27.48 KB)
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RegisterUsageInfo.cpp
(3.18 KB)
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RenameIndependentSubregs.cpp
(14.79 KB)
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ResetMachineFunctionPass.cpp
(3.48 KB)
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SafeStack.cpp
(34.12 KB)
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SafeStackLayout.cpp
(5.3 KB)
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SafeStackLayout.h
(2.41 KB)
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ScalarizeMaskedMemIntrin.cpp
(31.46 KB)
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ScheduleDAG.cpp
(21.34 KB)
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ScheduleDAGInstrs.cpp
(54.59 KB)
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ScheduleDAGPrinter.cpp
(3.21 KB)
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ScoreboardHazardRecognizer.cpp
(7.96 KB)
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SelectionDAG
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ShadowStackGCLowering.cpp
(14.16 KB)
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ShrinkWrap.cpp
(23.03 KB)
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SjLjEHPrepare.cpp
(18.93 KB)
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SlotIndexes.cpp
(9.35 KB)
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SpillPlacement.cpp
(12.58 KB)
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SpillPlacement.h
(6.67 KB)
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SplitKit.cpp
(66.39 KB)
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SplitKit.h
(23.7 KB)
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StackColoring.cpp
(49.03 KB)
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StackMapLivenessAnalysis.cpp
(6.16 KB)
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StackMaps.cpp
(19.74 KB)
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StackProtector.cpp
(22.94 KB)
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StackSlotColoring.cpp
(17.12 KB)
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SwiftErrorValueTracking.cpp
(11.37 KB)
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SwitchLoweringUtils.cpp
(18.33 KB)
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TailDuplication.cpp
(3.32 KB)
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TailDuplicator.cpp
(38.29 KB)
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TargetFrameLoweringImpl.cpp
(6.24 KB)
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TargetInstrInfo.cpp
(51.1 KB)
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TargetLoweringBase.cpp
(82.53 KB)
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TargetLoweringObjectFileImpl.cpp
(80.52 KB)
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TargetOptionsImpl.cpp
(2 KB)
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TargetPassConfig.cpp
(48.89 KB)
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TargetRegisterInfo.cpp
(19.15 KB)
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TargetSchedule.cpp
(13.16 KB)
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TargetSubtargetInfo.cpp
(1.89 KB)
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TwoAddressInstructionPass.cpp
(62.08 KB)
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TypePromotion.cpp
(32.46 KB)
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UnreachableBlockElim.cpp
(7.48 KB)
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ValueTypes.cpp
(19.87 KB)
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VirtRegMap.cpp
(21.4 KB)
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WasmEHPrepare.cpp
(17.48 KB)
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WinEHPrepare.cpp
(51.16 KB)
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XRayInstrumentation.cpp
(9.66 KB)
Editing: CalcSpillWeights.cpp
//===- CalcSpillWeights.cpp -----------------------------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// #include "llvm/CodeGen/CalcSpillWeights.h" #include "llvm/ADT/SmallPtrSet.h" #include "llvm/CodeGen/LiveInterval.h" #include "llvm/CodeGen/LiveIntervals.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineLoopInfo.h" #include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/TargetInstrInfo.h" #include "llvm/CodeGen/TargetRegisterInfo.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/CodeGen/VirtRegMap.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" #include <cassert> #include <tuple> using namespace llvm; #define DEBUG_TYPE "calcspillweights" void llvm::calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF, VirtRegMap *VRM, const MachineLoopInfo &MLI, const MachineBlockFrequencyInfo &MBFI, VirtRegAuxInfo::NormalizingFn norm) { LLVM_DEBUG(dbgs() << "********** Compute Spill Weights **********\n" << "********** Function: " << MF.getName() << '\n'); MachineRegisterInfo &MRI = MF.getRegInfo(); VirtRegAuxInfo VRAI(MF, LIS, VRM, MLI, MBFI, norm); for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) { unsigned Reg = Register::index2VirtReg(i); if (MRI.reg_nodbg_empty(Reg)) continue; VRAI.calculateSpillWeightAndHint(LIS.getInterval(Reg)); } } // Return the preferred allocation register for reg, given a COPY instruction. static Register copyHint(const MachineInstr *mi, unsigned reg, const TargetRegisterInfo &tri, const MachineRegisterInfo &mri) { unsigned sub, hsub; Register hreg; if (mi->getOperand(0).getReg() == reg) { sub = mi->getOperand(0).getSubReg(); hreg = mi->getOperand(1).getReg(); hsub = mi->getOperand(1).getSubReg(); } else { sub = mi->getOperand(1).getSubReg(); hreg = mi->getOperand(0).getReg(); hsub = mi->getOperand(0).getSubReg(); } if (!hreg) return 0; if (Register::isVirtualRegister(hreg)) return sub == hsub ? hreg : Register(); const TargetRegisterClass *rc = mri.getRegClass(reg); Register CopiedPReg = (hsub ? tri.getSubReg(hreg, hsub) : hreg); if (rc->contains(CopiedPReg)) return CopiedPReg; // Check if reg:sub matches so that a super register could be hinted. if (sub) return tri.getMatchingSuperReg(CopiedPReg, sub, rc); return 0; } // Check if all values in LI are rematerializable static bool isRematerializable(const LiveInterval &LI, const LiveIntervals &LIS, VirtRegMap *VRM, const TargetInstrInfo &TII) { unsigned Reg = LI.reg; unsigned Original = VRM ? VRM->getOriginal(Reg) : 0; for (LiveInterval::const_vni_iterator I = LI.vni_begin(), E = LI.vni_end(); I != E; ++I) { const VNInfo *VNI = *I; if (VNI->isUnused()) continue; if (VNI->isPHIDef()) return false; MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); assert(MI && "Dead valno in interval"); // Trace copies introduced by live range splitting. The inline // spiller can rematerialize through these copies, so the spill // weight must reflect this. if (VRM) { while (MI->isFullCopy()) { // The copy destination must match the interval register. if (MI->getOperand(0).getReg() != Reg) return false; // Get the source register. Reg = MI->getOperand(1).getReg(); // If the original (pre-splitting) registers match this // copy came from a split. if (!Register::isVirtualRegister(Reg) || VRM->getOriginal(Reg) != Original) return false; // Follow the copy live-in value. const LiveInterval &SrcLI = LIS.getInterval(Reg); LiveQueryResult SrcQ = SrcLI.Query(VNI->def); VNI = SrcQ.valueIn(); assert(VNI && "Copy from non-existing value"); if (VNI->isPHIDef()) return false; MI = LIS.getInstructionFromIndex(VNI->def); assert(MI && "Dead valno in interval"); } } if (!TII.isTriviallyReMaterializable(*MI, LIS.getAliasAnalysis())) return false; } return true; } void VirtRegAuxInfo::calculateSpillWeightAndHint(LiveInterval &li) { float weight = weightCalcHelper(li); // Check if unspillable. if (weight < 0) return; li.weight = weight; } float VirtRegAuxInfo::futureWeight(LiveInterval &li, SlotIndex start, SlotIndex end) { return weightCalcHelper(li, &start, &end); } float VirtRegAuxInfo::weightCalcHelper(LiveInterval &li, SlotIndex *start, SlotIndex *end) { MachineRegisterInfo &mri = MF.getRegInfo(); const TargetRegisterInfo &tri = *MF.getSubtarget().getRegisterInfo(); MachineBasicBlock *mbb = nullptr; MachineLoop *loop = nullptr; bool isExiting = false; float totalWeight = 0; unsigned numInstr = 0; // Number of instructions using li SmallPtrSet<MachineInstr*, 8> visited; std::pair<unsigned, unsigned> TargetHint = mri.getRegAllocationHint(li.reg); // Don't recompute spill weight for an unspillable register. bool Spillable = li.isSpillable(); bool localSplitArtifact = start && end; // Do not update future local split artifacts. bool updateLI = !localSplitArtifact; if (localSplitArtifact) { MachineBasicBlock *localMBB = LIS.getMBBFromIndex(*end); assert(localMBB == LIS.getMBBFromIndex(*start) && "start and end are expected to be in the same basic block"); // Local split artifact will have 2 additional copy instructions and they // will be in the same BB. // localLI = COPY other // ... // other = COPY localLI totalWeight += LiveIntervals::getSpillWeight(true, false, &MBFI, localMBB); totalWeight += LiveIntervals::getSpillWeight(false, true, &MBFI, localMBB); numInstr += 2; } // CopyHint is a sortable hint derived from a COPY instruction. struct CopyHint { unsigned Reg; float Weight; bool IsPhys; CopyHint(unsigned R, float W, bool P) : Reg(R), Weight(W), IsPhys(P) {} bool operator<(const CopyHint &rhs) const { // Always prefer any physreg hint. if (IsPhys != rhs.IsPhys) return (IsPhys && !rhs.IsPhys); if (Weight != rhs.Weight) return (Weight > rhs.Weight); return Reg < rhs.Reg; // Tie-breaker. } }; std::set<CopyHint> CopyHints; for (MachineRegisterInfo::reg_instr_nodbg_iterator I = mri.reg_instr_nodbg_begin(li.reg), E = mri.reg_instr_nodbg_end(); I != E;) { MachineInstr *mi = &*(I++); // For local split artifacts, we are interested only in instructions between // the expected start and end of the range. SlotIndex si = LIS.getInstructionIndex(*mi); if (localSplitArtifact && ((si < *start) || (si > *end))) continue; numInstr++; if (mi->isIdentityCopy() || mi->isImplicitDef()) continue; if (!visited.insert(mi).second) continue; float weight = 1.0f; if (Spillable) { // Get loop info for mi. if (mi->getParent() != mbb) { mbb = mi->getParent(); loop = Loops.getLoopFor(mbb); isExiting = loop ? loop->isLoopExiting(mbb) : false; } // Calculate instr weight. bool reads, writes; std::tie(reads, writes) = mi->readsWritesVirtualRegister(li.reg); weight = LiveIntervals::getSpillWeight(writes, reads, &MBFI, *mi); // Give extra weight to what looks like a loop induction variable update. if (writes && isExiting && LIS.isLiveOutOfMBB(li, mbb)) weight *= 3; totalWeight += weight; } // Get allocation hints from copies. if (!mi->isCopy()) continue; Register hint = copyHint(mi, li.reg, tri, mri); if (!hint) continue; // Force hweight onto the stack so that x86 doesn't add hidden precision, // making the comparison incorrectly pass (i.e., 1 > 1 == true??). // // FIXME: we probably shouldn't use floats at all. volatile float hweight = Hint[hint] += weight; if (Register::isVirtualRegister(hint) || mri.isAllocatable(hint)) CopyHints.insert( CopyHint(hint, hweight, Register::isPhysicalRegister(hint))); } Hint.clear(); // Pass all the sorted copy hints to mri. if (updateLI && CopyHints.size()) { // Remove a generic hint if previously added by target. if (TargetHint.first == 0 && TargetHint.second) mri.clearSimpleHint(li.reg); std::set<unsigned> HintedRegs; for (auto &Hint : CopyHints) { if (!HintedRegs.insert(Hint.Reg).second || (TargetHint.first != 0 && Hint.Reg == TargetHint.second)) // Don't add the same reg twice or the target-type hint again. continue; mri.addRegAllocationHint(li.reg, Hint.Reg); } // Weakly boost the spill weight of hinted registers. totalWeight *= 1.01F; } // If the live interval was already unspillable, leave it that way. if (!Spillable) return -1.0; // Mark li as unspillable if all live ranges are tiny and the interval // is not live at any reg mask. If the interval is live at a reg mask // spilling may be required. if (updateLI && li.isZeroLength(LIS.getSlotIndexes()) && !li.isLiveAtIndexes(LIS.getRegMaskSlots())) { li.markNotSpillable(); return -1.0; } // If all of the definitions of the interval are re-materializable, // it is a preferred candidate for spilling. // FIXME: this gets much more complicated once we support non-trivial // re-materialization. if (isRematerializable(li, LIS, VRM, *MF.getSubtarget().getInstrInfo())) totalWeight *= 0.5F; if (localSplitArtifact) return normalize(totalWeight, start->distance(*end), numInstr); return normalize(totalWeight, li.getSize(), numInstr); }
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