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AggressiveAntiDepBreaker.cpp
(37.23 KB)
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AggressiveAntiDepBreaker.h
(6.8 KB)
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AllocationOrder.cpp
(1.96 KB)
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AllocationOrder.h
(2.96 KB)
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Analysis.cpp
(32.62 KB)
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AsmPrinter
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AtomicExpandPass.cpp
(71.86 KB)
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BBSectionsPrepare.cpp
(18.8 KB)
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BasicTargetTransformInfo.cpp
(1.53 KB)
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BranchFolding.cpp
(77.92 KB)
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BranchFolding.h
(7.36 KB)
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BranchRelaxation.cpp
(19.45 KB)
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BreakFalseDeps.cpp
(9.79 KB)
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BuiltinGCs.cpp
(4.88 KB)
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CFGuardLongjmp.cpp
(3.73 KB)
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CFIInstrInserter.cpp
(17.53 KB)
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CalcSpillWeights.cpp
(10.22 KB)
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CallingConvLower.cpp
(10.4 KB)
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CodeGen.cpp
(5.28 KB)
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CodeGenPrepare.cpp
(295.01 KB)
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CommandFlags.cpp
(24.89 KB)
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CriticalAntiDepBreaker.cpp
(27.91 KB)
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CriticalAntiDepBreaker.h
(4.22 KB)
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DFAPacketizer.cpp
(10.91 KB)
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DeadMachineInstructionElim.cpp
(6.52 KB)
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DetectDeadLanes.cpp
(20.74 KB)
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DwarfEHPrepare.cpp
(9.01 KB)
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EarlyIfConversion.cpp
(37.51 KB)
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EdgeBundles.cpp
(3.21 KB)
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ExecutionDomainFix.cpp
(14.67 KB)
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ExpandMemCmp.cpp
(33.66 KB)
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ExpandPostRAPseudos.cpp
(7.28 KB)
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ExpandReductions.cpp
(7.23 KB)
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FEntryInserter.cpp
(1.81 KB)
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FaultMaps.cpp
(4.99 KB)
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FinalizeISel.cpp
(2.65 KB)
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FixupStatepointCallerSaved.cpp
(11.06 KB)
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FuncletLayout.cpp
(2.21 KB)
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GCMetadata.cpp
(5.1 KB)
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GCMetadataPrinter.cpp
(748 B)
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GCRootLowering.cpp
(11.46 KB)
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GCStrategy.cpp
(708 B)
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GlobalISel
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GlobalMerge.cpp
(24.52 KB)
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HardwareLoops.cpp
(18.44 KB)
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IfConversion.cpp
(89.43 KB)
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ImplicitNullChecks.cpp
(25.14 KB)
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IndirectBrExpandPass.cpp
(7.79 KB)
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InlineSpiller.cpp
(58.24 KB)
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InterferenceCache.cpp
(8.83 KB)
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InterferenceCache.h
(7.22 KB)
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InterleavedAccessPass.cpp
(16.59 KB)
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InterleavedLoadCombinePass.cpp
(42.35 KB)
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IntrinsicLowering.cpp
(17.08 KB)
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LLVMTargetMachine.cpp
(10.25 KB)
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LatencyPriorityQueue.cpp
(5.64 KB)
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LazyMachineBlockFrequencyInfo.cpp
(3.36 KB)
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LexicalScopes.cpp
(12.16 KB)
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LiveDebugValues.cpp
(78.98 KB)
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LiveDebugVariables.cpp
(51.79 KB)
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LiveDebugVariables.h
(2.15 KB)
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LiveInterval.cpp
(46.67 KB)
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LiveIntervalCalc.cpp
(7.62 KB)
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LiveIntervalUnion.cpp
(6.36 KB)
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LiveIntervals.cpp
(64.59 KB)
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LivePhysRegs.cpp
(11.08 KB)
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LiveRangeCalc.cpp
(15.72 KB)
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LiveRangeEdit.cpp
(17.03 KB)
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LiveRangeShrink.cpp
(8.69 KB)
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LiveRangeUtils.h
(2.12 KB)
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LiveRegMatrix.cpp
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LiveRegUnits.cpp
(4.72 KB)
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LiveStacks.cpp
(2.95 KB)
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LiveVariables.cpp
(30.26 KB)
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LocalStackSlotAllocation.cpp
(17.26 KB)
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LoopTraversal.cpp
(2.89 KB)
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LowLevelType.cpp
(1.93 KB)
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LowerEmuTLS.cpp
(5.66 KB)
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MBFIWrapper.cpp
(1.57 KB)
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MIRCanonicalizerPass.cpp
(12.46 KB)
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MIRNamerPass.cpp
(2.16 KB)
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MIRParser
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MIRPrinter.cpp
(32.67 KB)
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MIRPrintingPass.cpp
(1.99 KB)
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MIRVRegNamerUtils.cpp
(6.04 KB)
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MIRVRegNamerUtils.h
(3.25 KB)
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MachineBasicBlock.cpp
(50.47 KB)
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MachineBlockFrequencyInfo.cpp
(10.13 KB)
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MachineBlockPlacement.cpp
(137.61 KB)
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MachineBranchProbabilityInfo.cpp
(3.5 KB)
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MachineCSE.cpp
(31.82 KB)
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MachineCombiner.cpp
(28.13 KB)
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MachineCopyPropagation.cpp
(29.21 KB)
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MachineDebugify.cpp
(6.47 KB)
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MachineDominanceFrontier.cpp
(1.83 KB)
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MachineDominators.cpp
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MachineFrameInfo.cpp
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MachineFunction.cpp
(42.97 KB)
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MachineFunctionPass.cpp
(4.78 KB)
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MachineFunctionPrinterPass.cpp
(2.3 KB)
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MachineInstr.cpp
(76.39 KB)
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MachineInstrBundle.cpp
(11.49 KB)
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MachineLICM.cpp
(57.05 KB)
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MachineLoopInfo.cpp
(4.98 KB)
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MachineLoopUtils.cpp
(5.16 KB)
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MachineModuleInfo.cpp
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MachineModuleInfoImpls.cpp
(1.5 KB)
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MachineOperand.cpp
(39.6 KB)
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MachineOptimizationRemarkEmitter.cpp
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MachineOutliner.cpp
(42.13 KB)
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MachinePipeliner.cpp
(111.33 KB)
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MachinePostDominators.cpp
(2.42 KB)
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MachineRegionInfo.cpp
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MachineRegisterInfo.cpp
(22.97 KB)
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MachineSSAUpdater.cpp
(12.99 KB)
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MachineScheduler.cpp
(136.89 KB)
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MachineSink.cpp
(51.94 KB)
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MachineSizeOpts.cpp
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MachineStripDebug.cpp
(3.76 KB)
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MachineTraceMetrics.cpp
(49.58 KB)
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MachineVerifier.cpp
(107.98 KB)
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MacroFusion.cpp
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ModuloSchedule.cpp
(85.09 KB)
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NonRelocatableStringpool.cpp
(1.65 KB)
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OptimizePHIs.cpp
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PHIElimination.cpp
(27.73 KB)
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PHIEliminationUtils.cpp
(2.56 KB)
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PHIEliminationUtils.h
(972 B)
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ParallelCG.cpp
(3.71 KB)
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PatchableFunction.cpp
(3.44 KB)
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PeepholeOptimizer.cpp
(78.41 KB)
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PostRAHazardRecognizer.cpp
(3.5 KB)
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PostRASchedulerList.cpp
(24.31 KB)
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PreISelIntrinsicLowering.cpp
(7.91 KB)
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ProcessImplicitDefs.cpp
(5.4 KB)
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PrologEpilogInserter.cpp
(50.45 KB)
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PseudoSourceValue.cpp
(4.71 KB)
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RDFGraph.cpp
(58.39 KB)
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RDFLiveness.cpp
(40.7 KB)
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RDFRegisters.cpp
(11.29 KB)
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ReachingDefAnalysis.cpp
(21.74 KB)
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RegAllocBase.cpp
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RegAllocBase.h
(4.63 KB)
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RegAllocBasic.cpp
(11.33 KB)
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RegAllocFast.cpp
(45.78 KB)
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RegAllocGreedy.cpp
(123.32 KB)
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RegAllocPBQP.cpp
(33.14 KB)
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RegUsageInfoCollector.cpp
(7.39 KB)
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RegUsageInfoPropagate.cpp
(5.07 KB)
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RegisterClassInfo.cpp
(6.62 KB)
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RegisterCoalescer.cpp
(151.71 KB)
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RegisterCoalescer.h
(4.04 KB)
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RegisterPressure.cpp
(48.86 KB)
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RegisterScavenging.cpp
(27.48 KB)
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RegisterUsageInfo.cpp
(3.18 KB)
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RenameIndependentSubregs.cpp
(14.79 KB)
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ResetMachineFunctionPass.cpp
(3.48 KB)
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SafeStack.cpp
(34.12 KB)
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SafeStackLayout.cpp
(5.3 KB)
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SafeStackLayout.h
(2.41 KB)
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ScalarizeMaskedMemIntrin.cpp
(31.46 KB)
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ScheduleDAG.cpp
(21.34 KB)
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ScheduleDAGInstrs.cpp
(54.59 KB)
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ScheduleDAGPrinter.cpp
(3.21 KB)
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ScoreboardHazardRecognizer.cpp
(7.96 KB)
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SelectionDAG
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ShadowStackGCLowering.cpp
(14.16 KB)
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ShrinkWrap.cpp
(23.03 KB)
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SjLjEHPrepare.cpp
(18.93 KB)
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SlotIndexes.cpp
(9.35 KB)
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SpillPlacement.cpp
(12.58 KB)
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SpillPlacement.h
(6.67 KB)
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SplitKit.cpp
(66.39 KB)
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SplitKit.h
(23.7 KB)
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StackColoring.cpp
(49.03 KB)
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StackMapLivenessAnalysis.cpp
(6.16 KB)
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StackMaps.cpp
(19.74 KB)
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StackProtector.cpp
(22.94 KB)
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StackSlotColoring.cpp
(17.12 KB)
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SwiftErrorValueTracking.cpp
(11.37 KB)
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SwitchLoweringUtils.cpp
(18.33 KB)
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TailDuplication.cpp
(3.32 KB)
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TailDuplicator.cpp
(38.29 KB)
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TargetFrameLoweringImpl.cpp
(6.24 KB)
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TargetInstrInfo.cpp
(51.1 KB)
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TargetLoweringBase.cpp
(82.53 KB)
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TargetLoweringObjectFileImpl.cpp
(80.52 KB)
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TargetOptionsImpl.cpp
(2 KB)
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TargetPassConfig.cpp
(48.89 KB)
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TargetRegisterInfo.cpp
(19.15 KB)
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TargetSchedule.cpp
(13.16 KB)
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TargetSubtargetInfo.cpp
(1.89 KB)
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TwoAddressInstructionPass.cpp
(62.08 KB)
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TypePromotion.cpp
(32.46 KB)
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UnreachableBlockElim.cpp
(7.48 KB)
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ValueTypes.cpp
(19.87 KB)
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VirtRegMap.cpp
(21.4 KB)
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WasmEHPrepare.cpp
(17.48 KB)
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WinEHPrepare.cpp
(51.16 KB)
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XRayInstrumentation.cpp
(9.66 KB)
Editing: CallingConvLower.cpp
//===-- CallingConvLower.cpp - Calling Conventions ------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file implements the CCState class, used for lowering and implementing // calling conventions. // //===----------------------------------------------------------------------===// #include "llvm/CodeGen/CallingConvLower.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/TargetLowering.h" #include "llvm/CodeGen/TargetRegisterInfo.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/IR/DataLayout.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/SaveAndRestore.h" #include "llvm/Support/raw_ostream.h" #include <algorithm> using namespace llvm; CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf, SmallVectorImpl<CCValAssign> &locs, LLVMContext &C) : CallingConv(CC), IsVarArg(isVarArg), MF(mf), TRI(*MF.getSubtarget().getRegisterInfo()), Locs(locs), Context(C) { // No stack is used. StackOffset = 0; clearByValRegsInfo(); UsedRegs.resize((TRI.getNumRegs()+31)/32); } /// Allocate space on the stack large enough to pass an argument by value. /// The size and alignment information of the argument is encoded in /// its parameter attribute. void CCState::HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, Align MinAlign, ISD::ArgFlagsTy ArgFlags) { Align Alignment = ArgFlags.getNonZeroByValAlign(); unsigned Size = ArgFlags.getByValSize(); if (MinSize > (int)Size) Size = MinSize; if (MinAlign > Alignment) Alignment = MinAlign; ensureMaxAlignment(Alignment); MF.getSubtarget().getTargetLowering()->HandleByVal(this, Size, Alignment); Size = unsigned(alignTo(Size, MinAlign)); unsigned Offset = AllocateStack(Size, Alignment); addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo)); } /// Mark a register and all of its aliases as allocated. void CCState::MarkAllocated(MCPhysReg Reg) { for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) UsedRegs[*AI / 32] |= 1 << (*AI & 31); } bool CCState::IsShadowAllocatedReg(MCRegister Reg) const { if (!isAllocated(Reg)) return false; for (auto const &ValAssign : Locs) { if (ValAssign.isRegLoc()) { for (MCRegAliasIterator AI(ValAssign.getLocReg(), &TRI, true); AI.isValid(); ++AI) { if (*AI == Reg) return false; } } } return true; } /// Analyze an array of argument values, /// incorporating info about the formals into this state. void CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, CCAssignFn Fn) { unsigned NumArgs = Ins.size(); for (unsigned i = 0; i != NumArgs; ++i) { MVT ArgVT = Ins[i].VT; ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) report_fatal_error("unable to allocate function argument #" + Twine(i)); } } /// Analyze the return values of a function, returning true if the return can /// be performed without sret-demotion and false otherwise. bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, CCAssignFn Fn) { // Determine which register each value should be copied into. for (unsigned i = 0, e = Outs.size(); i != e; ++i) { MVT VT = Outs[i].VT; ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) return false; } return true; } /// Analyze the returned values of a return, /// incorporating info about the result values into this state. void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, CCAssignFn Fn) { // Determine which register each value should be copied into. for (unsigned i = 0, e = Outs.size(); i != e; ++i) { MVT VT = Outs[i].VT; ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) report_fatal_error("unable to allocate function return #" + Twine(i)); } } /// Analyze the outgoing arguments to a call, /// incorporating info about the passed values into this state. void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, CCAssignFn Fn) { unsigned NumOps = Outs.size(); for (unsigned i = 0; i != NumOps; ++i) { MVT ArgVT = Outs[i].VT; ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { #ifndef NDEBUG dbgs() << "Call operand #" << i << " has unhandled type " << EVT(ArgVT).getEVTString() << '\n'; #endif llvm_unreachable(nullptr); } } } /// Same as above except it takes vectors of types and argument flags. void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &Flags, CCAssignFn Fn) { unsigned NumOps = ArgVTs.size(); for (unsigned i = 0; i != NumOps; ++i) { MVT ArgVT = ArgVTs[i]; ISD::ArgFlagsTy ArgFlags = Flags[i]; if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { #ifndef NDEBUG dbgs() << "Call operand #" << i << " has unhandled type " << EVT(ArgVT).getEVTString() << '\n'; #endif llvm_unreachable(nullptr); } } } /// Analyze the return values of a call, incorporating info about the passed /// values into this state. void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, CCAssignFn Fn) { for (unsigned i = 0, e = Ins.size(); i != e; ++i) { MVT VT = Ins[i].VT; ISD::ArgFlagsTy Flags = Ins[i].Flags; if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) { #ifndef NDEBUG dbgs() << "Call result #" << i << " has unhandled type " << EVT(VT).getEVTString() << '\n'; #endif llvm_unreachable(nullptr); } } } /// Same as above except it's specialized for calls that produce a single value. void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) { if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) { #ifndef NDEBUG dbgs() << "Call result has unhandled type " << EVT(VT).getEVTString() << '\n'; #endif llvm_unreachable(nullptr); } } static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) { if (VT.isVector()) return true; // Assume -msse-regparm might be in effect. if (!VT.isInteger()) return false; if (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall) return true; return false; } void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs, MVT VT, CCAssignFn Fn) { unsigned SavedStackOffset = StackOffset; Align SavedMaxStackArgAlign = MaxStackArgAlign; unsigned NumLocs = Locs.size(); // Set the 'inreg' flag if it is used for this calling convention. ISD::ArgFlagsTy Flags; if (isValueTypeInRegForCC(CallingConv, VT)) Flags.setInReg(); // Allocate something of this value type repeatedly until we get assigned a // location in memory. bool HaveRegParm = true; while (HaveRegParm) { if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) { #ifndef NDEBUG dbgs() << "Call has unhandled type " << EVT(VT).getEVTString() << " while computing remaining regparms\n"; #endif llvm_unreachable(nullptr); } HaveRegParm = Locs.back().isRegLoc(); } // Copy all the registers from the value locations we added. assert(NumLocs < Locs.size() && "CC assignment failed to add location"); for (unsigned I = NumLocs, E = Locs.size(); I != E; ++I) if (Locs[I].isRegLoc()) Regs.push_back(MCPhysReg(Locs[I].getLocReg())); // Clear the assigned values and stack memory. We leave the registers marked // as allocated so that future queries don't return the same registers, i.e. // when i64 and f64 are both passed in GPRs. StackOffset = SavedStackOffset; MaxStackArgAlign = SavedMaxStackArgAlign; Locs.resize(NumLocs); } void CCState::analyzeMustTailForwardedRegisters( SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes, CCAssignFn Fn) { // Oftentimes calling conventions will not user register parameters for // variadic functions, so we need to assume we're not variadic so that we get // all the registers that might be used in a non-variadic call. SaveAndRestore<bool> SavedVarArg(IsVarArg, false); SaveAndRestore<bool> SavedMustTail(AnalyzingMustTailForwardedRegs, true); for (MVT RegVT : RegParmTypes) { SmallVector<MCPhysReg, 8> RemainingRegs; getRemainingRegParmsForType(RemainingRegs, RegVT, Fn); const TargetLowering *TL = MF.getSubtarget().getTargetLowering(); const TargetRegisterClass *RC = TL->getRegClassFor(RegVT); for (MCPhysReg PReg : RemainingRegs) { unsigned VReg = MF.addLiveIn(PReg, RC); Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT)); } } } bool CCState::resultsCompatible(CallingConv::ID CalleeCC, CallingConv::ID CallerCC, MachineFunction &MF, LLVMContext &C, const SmallVectorImpl<ISD::InputArg> &Ins, CCAssignFn CalleeFn, CCAssignFn CallerFn) { if (CalleeCC == CallerCC) return true; SmallVector<CCValAssign, 4> RVLocs1; CCState CCInfo1(CalleeCC, false, MF, RVLocs1, C); CCInfo1.AnalyzeCallResult(Ins, CalleeFn); SmallVector<CCValAssign, 4> RVLocs2; CCState CCInfo2(CallerCC, false, MF, RVLocs2, C); CCInfo2.AnalyzeCallResult(Ins, CallerFn); if (RVLocs1.size() != RVLocs2.size()) return false; for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) { const CCValAssign &Loc1 = RVLocs1[I]; const CCValAssign &Loc2 = RVLocs2[I]; if ( // Must both be in registers, or both in memory Loc1.isRegLoc() != Loc2.isRegLoc() || // Must fill the same part of their locations Loc1.getLocInfo() != Loc2.getLocInfo() || // Memory offset/register number must be the same Loc1.getExtraInfo() != Loc2.getExtraInfo()) return false; } return true; }
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