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003 File Manager

Current Path: /usr/src/sys/mips/conf

📁 ..
📄 ALFA_HORNET_UB(1.25 KB)
📄 ALFA_HORNET_UB.hints(2.66 KB)
📄 AP121(1.09 KB)
📄 AP121.hints(2.61 KB)
📄 AP135(1.6 KB)
📄 AP135.hints(5.13 KB)
📄 AP143(1.1 KB)
📄 AP143.hints(2.9 KB)
📄 AP91(1.49 KB)
📄 AP91.hints(2.66 KB)
📄 AP93(1.03 KB)
📄 AP93.hints(3.34 KB)
📄 AP94(760 B)
📄 AP94.hints(717 B)
📄 AP96(1.06 KB)
📄 AP96.hints(2.39 KB)
📄 AR5312_BASE.hints(574 B)
📄 AR5315_BASE.hints(593 B)
📄 AR71XX_BASE(1.58 KB)
📄 AR71XX_BASE.hints(1.2 KB)
📄 AR724X_BASE.hints(1.2 KB)
📄 AR91XX_BASE.hints(1.48 KB)
📄 AR933X_BASE.hints(1.77 KB)
📄 AR934X_BASE.hints(1.95 KB)
📄 BCM(2.44 KB)
📄 BCM.hints(146 B)
📄 BERI_DE4.hints(691 B)
📄 BERI_DE4_BASE(1.13 KB)
📄 BERI_DE4_MDROOT(518 B)
📄 BERI_DE4_SDROOT(365 B)
📄 BERI_NETFPGA_MDROOT(786 B)
📄 BERI_SIM_BASE(382 B)
📄 BERI_SIM_MDROOT(481 B)
📄 BERI_SIM_SDROOT(348 B)
📄 BERI_SIM_VIRTIO(413 B)
📄 BERI_SOCKIT(566 B)
📄 BERI_TPAD.hints(1.5 KB)
📄 CANNA(602 B)
📄 CARAMBOLA2(1.14 KB)
📄 CARAMBOLA2.hints(3.2 KB)
📄 CI20(682 B)
📄 DB120(1.12 KB)
📄 DB120.hints(4.54 KB)
📄 DEFAULTS(162 B)
📄 DIR-655A1(1.25 KB)
📄 DIR-655A1.hints(4.98 KB)
📄 DIR-825B1(1.3 KB)
📄 DIR-825B1.hints(3.63 KB)
📄 DIR-825C1(1.51 KB)
📄 DIR-825C1.hints(4.21 KB)
📄 ENH200(1.04 KB)
📄 ENH200.hints(3.32 KB)
📄 ERL(8.33 KB)
📄 JZ4780(2.91 KB)
📄 JZ4780.hints(27 B)
📄 MALTA(163 B)
📄 MALTA.hints(112 B)
📄 MALTA64(243 B)
📄 MALTA64EL(190 B)
📄 MALTAEL(168 B)
📄 MT7620.hints(3.26 KB)
📄 MT7620A_FDT(1.35 KB)
📄 MT7620N_FDT(1.33 KB)
📄 MT7621_FDT(1.33 KB)
📄 MT7628_FDT(1.38 KB)
📄 OCTEON1(8.95 KB)
📄 OCTEON1.hints(303 B)
📄 ONIONOMEGA(1.07 KB)
📄 ONIONOMEGA.hints(3.33 KB)
📄 PB47(945 B)
📄 PB47.hints(1.87 KB)
📄 PB92(3.3 KB)
📄 PB92.hints(2.46 KB)
📄 PICOSTATION_M2HP(1.57 KB)
📄 PICOSTATION_M2HP.hints(2.8 KB)
📄 QCA953X_BASE(2.25 KB)
📄 QCA953X_BASE.hints(2.08 KB)
📄 QCA955X_BASE.hints(2.11 KB)
📄 ROCKET_M2HP(1.55 KB)
📄 ROCKET_M2HP.hints(2.79 KB)
📄 ROUTERSTATION(503 B)
📄 ROUTERSTATION.hints(1.04 KB)
📄 ROUTERSTATION_MFS(349 B)
📄 RSPRO(521 B)
📄 RSPRO.hints(1.19 KB)
📄 RSPRO_MFS(441 B)
📄 RSPRO_STANDALONE(476 B)
📄 RT2880_FDT(1.36 KB)
📄 RT3050_FDT(1.37 KB)
📄 RT305X.hints(3.09 KB)
📄 RT3352_FDT(1.33 KB)
📄 RT3883_FDT(1.46 KB)
📄 RT5350.hints(826 B)
📄 RT5350_FDT(1.33 KB)
📄 TL-ARCHERC7V2(1.7 KB)
📄 TL-ARCHERC7V2.hints(5.58 KB)
📄 TL-WDR4300(1.31 KB)
📄 TL-WDR4300.hints(6.23 KB)
📄 TL-WR1043NDv2(1.23 KB)
📄 TL-WR1043NDv2.hints(4.52 KB)
📄 TL-WR740Nv4(1.13 KB)
📄 TL-WR740Nv4.hints(2.38 KB)
📄 TP-MR3020(1.19 KB)
📄 TP-MR3020.hints(2.4 KB)
📄 TP-MR3040(1.84 KB)
📄 TP-MR3040.hints(2.53 KB)
📄 TP-WN1043ND(1.38 KB)
📄 TP-WN1043ND.hints(3.24 KB)
📄 WZR-300HP(1.11 KB)
📄 WZR-300HP.hints(5.54 KB)
📄 WZR-HPAG300H(1.15 KB)
📄 WZR-HPAG300H.hints(3.35 KB)
📄 X1000(2.46 KB)
📄 X1000.hints(27 B)
📄 XLP.hints(114 B)
📄 XLP64(984 B)
📄 XLPN32(1.02 KB)
📄 std.AR5312(1.73 KB)
📄 std.AR5315(1.71 KB)
📄 std.AR724X(1.74 KB)
📄 std.AR91XX(1.78 KB)
📄 std.AR933X(2.06 KB)
📄 std.AR934X(2.05 KB)
📄 std.AR_MIPS_BASE(2.33 KB)
📄 std.BERI(1.41 KB)
📄 std.MALTA(1.96 KB)
📄 std.QCA955X(2.1 KB)
📄 std.XLP(2.72 KB)

Editing: DIR-655A1.hints

# I'm assuming this is an AP135-020. The AP136-010 in openwrt has
# the ethernet ports wired up to the switch in the reverse way.

# $FreeBSD$

# QCA955X_ETH_CFG_RGMII_EN (1 << 0)
hint.qca955x_gmac.0.gmac_cfg=0x1

# Use this to derive ath0 from arge0 MAC address.
# 0x1ffe0004 is the arge0 MAC; but it's also the "unit MAC".
# So make that the ath0 MAC, and make arge0 -1 from that.
# ath0: offset 0
# arge0: offset -1
# arge1: use +1 from the arge0 MAC, even though
# there's a secondary MAC address configured in EEPROM
# at 0x1ffe0018.
hint.ar71xx.0.eeprom_mac_addr=0x1ffe0004
hint.ar71xx.0.eeprom_mac_isascii=1

hint.ar71xx_mac_map.0.devid=ath
hint.ar71xx_mac_map.0.unitid=0
hint.ar71xx_mac_map.0.offset=0
hint.ar71xx_mac_map.0.is_local=0

hint.ar71xx_mac_map.1.devid=arge
hint.ar71xx_mac_map.1.unitid=0
hint.ar71xx_mac_map.1.offset=-1
hint.ar71xx_mac_map.1.is_local=0

hint.ar71xx_mac_map.2.devid=arge
hint.ar71xx_mac_map.2.unitid=1
hint.ar71xx_mac_map.2.offset=1
hint.ar71xx_mac_map.2.is_local=0

# mdiobus0 on arge0
hint.argemdio.0.at="nexus0"
hint.argemdio.0.maddr=0x19000000
hint.argemdio.0.msize=0x1000
hint.argemdio.0.order=0

# mdiobus1 on arge1 - required to bring up arge1?
hint.argemdio.1.at="nexus0"
hint.argemdio.1.maddr=0x1a000000
hint.argemdio.1.msize=0x1000
hint.argemdio.1.order=0

# AR8327 - connected via mdiobus0 on arge0
hint.arswitch.0.at="mdio0"
hint.arswitch.0.is_7240=0	# definitely not the internal switch!
hint.arswitch.0.is_9340=0	# not the internal switch!
hint.arswitch.0.numphys=5	# all ports are PHYs
hint.arswitch.0.phy4cpu=0
hint.arswitch.0.is_rgmii=0	# not needed
hint.arswitch.0.is_gmii=0	# not needed

# This is where it gets a bit odd. port 0 and port 6 are CPU ports.
# The current code only supports one CPU port.  So hm, what should
# we do to hook PAD6 up to be RGMII but a PHY, not a MAC?

# The other trick - how do we get arge1 (hooked up to GMAC0) to work?
# That's currently supposed to be hooked up to CPU port 0.

# Other AR8327 configuration parameters

# AP136-020 parameters

# GMAC0 AR8327 -> GMAC1 (arge1) SoC, SGMII

# AR8327_PAD_MAC_SGMII
hint.arswitch.0.pad.0.mode=3
#hint.arswitch.0.pad.0.rxclk_delay_sel=0
hint.arswitch.0.pad.0.sgmii_delay_en=1

# GMAC6 AR8327 -> GMAC0 (arge0) SoC, RGMII

# AR8327_PAD_MAC_RGMII
# XXX I think this hooks it up to the internal MAC6
hint.arswitch.0.pad.6.mode=6
hint.arswitch.0.pad.6.txclk_delay_en=1
hint.arswitch.0.pad.6.rxclk_delay_en=1
# AR8327_CLK_DELAY_SEL1
hint.arswitch.0.pad.6.txclk_delay_sel=1
# AR8327_CLK_DELAY_SEL2
hint.arswitch.0.pad.6.rxclk_delay_sel=2

# XXX there's no LED management just yet!
hint.arswitch.0.led.ctrl0=0x00000000
hint.arswitch.0.led.ctrl1=0xc737c737
hint.arswitch.0.led.ctrl2=0x00000000
hint.arswitch.0.led.ctrl3=0x00c30c00
hint.arswitch.0.led.open_drain=1

# force_link=1 is required for the rest of the parameters
# to be configured.
hint.arswitch.0.port.0.force_link=1
hint.arswitch.0.port.0.speed=1000
hint.arswitch.0.port.0.duplex=1
hint.arswitch.0.port.0.txpause=1
hint.arswitch.0.port.0.rxpause=1

# force_link=1 is required for the rest of the parameters
# to be configured.
hint.arswitch.0.port.6.force_link=1
hint.arswitch.0.port.6.speed=1000
hint.arswitch.0.port.6.duplex=1
hint.arswitch.0.port.6.txpause=1
hint.arswitch.0.port.6.rxpause=1

# arge0 - hooked up to AR8327 GMAC6, RGMII
# set at 1000/full to the switch.
# so, lock both sides of this connect up to 1000/full;
# if_arge thus wont change the PLL configuration
# upon a link status change.
hint.arge.0.phymask=0x0
hint.arge.0.miimode=3           # RGMII
hint.arge.0.media=1000
hint.arge.0.fduplex=1
hint.arge.0.pll_1000=0x56000000
# hint.arge.0.eeprommac=0x1ffe0004
# hint.arge.0.readascii=1

# arge1 - lock up to 1000/full
hint.arge.1.phymask=0x0
hint.arge.1.media=1000
hint.arge.1.fduplex=1
hint.arge.1.miimode=5		# SGMII
hint.arge.1.pll_1000=0x03000101
#hint.arge.1.eeprommac=0x1ffe0018
#hint.arge.1.readascii=1

# ath0: Where the ART is - last 64k in the flash
# Note: ath0 MAC is default (00:11:22:33:44:55) and thus
# requires replacing via the board MAC address map.
hint.ath.0.eepromaddr=0x1fff0000
hint.ath.0.eepromsize=16384

# 256KiB u-boot
hint.map.0.at="flash/spi0"
hint.map.0.start=0x00000000
hint.map.0.end=0x00040000	# 256k u-boot
hint.map.0.name="u-boot"
hint.map.0.readonly=1

# kernel
hint.map.1.at="flash/spi0"
hint.map.1.start=0x00040000
hint.map.1.end="search:0x00040000:0x10000:.!/bin/sh"
hint.map.1.name="kernel"
hint.map.1.readonly=1

# rootfs
hint.map.2.at="flash/spi0"
hint.map.2.start="search:0x00040000:0x10000:.!/bin/sh"
hint.map.2.end=0x007d0000
hint.map.2.name="rootfs"
hint.map.2.readonly=1

# 64KiB cfg
hint.map.3.at="flash/spi0"
hint.map.3.start=0x007d0000
hint.map.3.end=0x007e0000
hint.map.3.name="cfg"
hint.map.3.readonly=0

# 8256 KiB mib0
hint.map.4.at="flash/spi0"
hint.map.4.start=0x007e0000
hint.map.4.end=0x00ff0000	# 64k mib0
hint.map.4.name="mib0"
hint.map.4.readonly=1

# 64KiB ART
# XXX TODO: is this really here?
hint.map.5.at="flash/spi0"
hint.map.5.start=0x00ff0000
hint.map.5.end=0x01000000	# 64k ART
hint.map.5.name="ART"
hint.map.5.readonly=1

003 File Manager

Editing: DIR-655A1.hints

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