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usr / src / contrib / llvm-project / llvm / lib / Target / Hexagon /

📁 ..
📁 AsmParser
📄 BitTracker.cpp(35.36 KB)
📄 BitTracker.h(17.25 KB)
📁 Disassembler
📄 Hexagon.h(1004 B)
📄 Hexagon.td(17.33 KB)
📄 HexagonArch.h(1.2 KB)
📄 HexagonAsmPrinter.cpp(26.65 KB)
📄 HexagonAsmPrinter.h(2.03 KB)
📄 HexagonBitSimplify.cpp(107.45 KB)
📄 HexagonBitTracker.cpp(39.88 KB)
📄 HexagonBitTracker.h(2.5 KB)
📄 HexagonBlockRanges.cpp(15.85 KB)
📄 HexagonBlockRanges.h(6.97 KB)
📄 HexagonBranchRelaxation.cpp(7.78 KB)
📄 HexagonCFGOptimizer.cpp(8.4 KB)
📄 HexagonCallingConv.td(4.46 KB)
📄 HexagonCommonGEP.cpp(41.47 KB)
📄 HexagonConstExtenders.cpp(70.64 KB)
📄 HexagonConstPropagation.cpp(97.75 KB)
📄 HexagonCopyToCombine.cpp(32.2 KB)
📄 HexagonDepArch.h(2.04 KB)
📄 HexagonDepArch.td(1.87 KB)
📄 HexagonDepDecoders.inc(2.55 KB)
📄 HexagonDepIICHVX.td(113.05 KB)
📄 HexagonDepIICScalar.td(224.12 KB)
📄 HexagonDepITypes.h(1.51 KB)
📄 HexagonDepITypes.td(1.91 KB)
📄 HexagonDepInstrFormats.td(91.89 KB)
📄 HexagonDepInstrInfo.td(1021.44 KB)
📄 HexagonDepMapAsm2Intrin.td(255.17 KB)
📄 HexagonDepMappings.td(64.27 KB)
📄 HexagonDepMask.h(51.94 KB)
📄 HexagonDepOperands.td(12.12 KB)
📄 HexagonDepTimingClasses.h(4.69 KB)
📄 HexagonEarlyIfConv.cpp(37.36 KB)
📄 HexagonExpandCondsets.cpp(48.55 KB)
📄 HexagonFixupHwLoops.cpp(6.54 KB)
📄 HexagonFrameLowering.cpp(97.16 KB)
📄 HexagonFrameLowering.h(7.85 KB)
📄 HexagonGenExtract.cpp(8.61 KB)
📄 HexagonGenInsert.cpp(53.24 KB)
📄 HexagonGenMux.cpp(12.71 KB)
📄 HexagonGenPredicate.cpp(16.25 KB)
📄 HexagonHardwareLoops.cpp(70.32 KB)
📄 HexagonHazardRecognizer.cpp(5.85 KB)
📄 HexagonHazardRecognizer.h(3.58 KB)
📄 HexagonIICHVX.td(1.21 KB)
📄 HexagonIICScalar.td(1.34 KB)
📄 HexagonISelDAGToDAG.cpp(78.63 KB)
📄 HexagonISelDAGToDAG.h(5.88 KB)
📄 HexagonISelDAGToDAGHVX.cpp(68.26 KB)
📄 HexagonISelLowering.cpp(134.65 KB)
📄 HexagonISelLowering.h(22.5 KB)
📄 HexagonISelLoweringHVX.cpp(70.57 KB)
📄 HexagonInstrFormats.td(12.04 KB)
📄 HexagonInstrFormatsV60.td(1.03 KB)
📄 HexagonInstrFormatsV65.td(1.54 KB)
📄 HexagonInstrInfo.cpp(161.08 KB)
📄 HexagonInstrInfo.h(25.31 KB)
📄 HexagonIntrinsics.td(19.21 KB)
📄 HexagonIntrinsicsV5.td(16.8 KB)
📄 HexagonIntrinsicsV60.td(28.9 KB)
📄 HexagonLoopIdiomRecognition.cpp(79.16 KB)
📄 HexagonMCInstLower.cpp(6.25 KB)
📄 HexagonMachineFunctionInfo.cpp(507 B)
📄 HexagonMachineFunctionInfo.h(3.32 KB)
📄 HexagonMachineScheduler.cpp(34.25 KB)
📄 HexagonMachineScheduler.h(8.66 KB)
📄 HexagonMapAsm2IntrinV62.gen.td(8.71 KB)
📄 HexagonMapAsm2IntrinV65.gen.td(12.43 KB)
📄 HexagonNewValueJump.cpp(25.57 KB)
📄 HexagonOperands.td(1.62 KB)
📄 HexagonOptAddrMode.cpp(29.37 KB)
📄 HexagonOptimizeSZextends.cpp(4.74 KB)
📄 HexagonPatterns.td(142.35 KB)
📄 HexagonPatternsHVX.td(22.06 KB)
📄 HexagonPatternsV65.td(2.96 KB)
📄 HexagonPeephole.cpp(10.18 KB)
📄 HexagonPseudo.td(21.62 KB)
📄 HexagonRDFOpt.cpp(9.94 KB)
📄 HexagonRegisterInfo.cpp(12.03 KB)
📄 HexagonRegisterInfo.h(2.88 KB)
📄 HexagonRegisterInfo.td(20.42 KB)
📄 HexagonSchedule.td(2.33 KB)
📄 HexagonScheduleV5.td(1.73 KB)
📄 HexagonScheduleV55.td(1.81 KB)
📄 HexagonScheduleV60.td(4.31 KB)
📄 HexagonScheduleV62.td(1.53 KB)
📄 HexagonScheduleV65.td(1.57 KB)
📄 HexagonScheduleV66.td(1.57 KB)
📄 HexagonScheduleV67.td(1.57 KB)
📄 HexagonScheduleV67T.td(2.51 KB)
📄 HexagonSelectionDAGInfo.cpp(2.35 KB)
📄 HexagonSelectionDAGInfo.h(1.24 KB)
📄 HexagonSplitConst32AndConst64.cpp(4.15 KB)
📄 HexagonSplitDouble.cpp(37.86 KB)
📄 HexagonStoreWidening.cpp(20.47 KB)
📄 HexagonSubtarget.cpp(20.97 KB)
📄 HexagonSubtarget.h(10.59 KB)
📄 HexagonTargetMachine.cpp(16 KB)
📄 HexagonTargetMachine.h(1.77 KB)
📄 HexagonTargetObjectFile.cpp(16.8 KB)
📄 HexagonTargetObjectFile.h(2.17 KB)
📄 HexagonTargetStreamer.h(1.2 KB)
📄 HexagonTargetTransformInfo.cpp(13.11 KB)
📄 HexagonTargetTransformInfo.h(6.27 KB)
📄 HexagonVExtract.cpp(6.64 KB)
📄 HexagonVLIWPacketizer.cpp(67.01 KB)
📄 HexagonVLIWPacketizer.h(6.09 KB)
📄 HexagonVectorLoopCarriedReuse.cpp(23.99 KB)
📄 HexagonVectorPrint.cpp(7.06 KB)
📁 MCTargetDesc
📄 RDFCopy.cpp(6.37 KB)
📄 RDFCopy.h(1.69 KB)
📄 RDFDeadCode.cpp(7.5 KB)
📄 RDFDeadCode.h(2.33 KB)
📁 TargetInfo

Editing: HexagonBranchRelaxation.cpp

//===--- HexagonBranchRelaxation.cpp - Identify and relax long jumps ------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#define DEBUG_TYPE "hexagon-brelax"

#include "Hexagon.h"
#include "HexagonInstrInfo.h"
#include "HexagonSubtarget.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Pass.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstdint>
#include <cstdlib>
#include <iterator>

using namespace llvm;

// Since we have no exact knowledge of code layout, allow some safety buffer
// for jump target. This is measured in bytes.
static cl::opt<uint32_t> BranchRelaxSafetyBuffer("branch-relax-safety-buffer",
  cl::init(200), cl::Hidden, cl::ZeroOrMore, cl::desc("safety buffer size"));

namespace llvm {

FunctionPass *createHexagonBranchRelaxation();
  void initializeHexagonBranchRelaxationPass(PassRegistry&);

} // end namespace llvm

namespace {

struct HexagonBranchRelaxation : public MachineFunctionPass {
  public:
    static char ID;

HexagonBranchRelaxation() : MachineFunctionPass(ID) {
      initializeHexagonBranchRelaxationPass(*PassRegistry::getPassRegistry());
    }

bool runOnMachineFunction(MachineFunction &MF) override;

StringRef getPassName() const override {
      return "Hexagon Branch Relaxation";
    }

void getAnalysisUsage(AnalysisUsage &AU) const override {
      AU.setPreservesCFG();
      MachineFunctionPass::getAnalysisUsage(AU);
    }

private:
    const HexagonInstrInfo *HII;
    const HexagonRegisterInfo *HRI;

bool relaxBranches(MachineFunction &MF);
    void computeOffset(MachineFunction &MF,
          DenseMap<MachineBasicBlock*, unsigned> &BlockToInstOffset);
    bool reGenerateBranch(MachineFunction &MF,
          DenseMap<MachineBasicBlock*, unsigned> &BlockToInstOffset);
    bool isJumpOutOfRange(MachineInstr &MI,
          DenseMap<MachineBasicBlock*, unsigned> &BlockToInstOffset);
  };

char HexagonBranchRelaxation::ID = 0;

} // end anonymous namespace

INITIALIZE_PASS(HexagonBranchRelaxation, "hexagon-brelax",
                "Hexagon Branch Relaxation", false, false)

FunctionPass *llvm::createHexagonBranchRelaxation() {
  return new HexagonBranchRelaxation();
}

bool HexagonBranchRelaxation::runOnMachineFunction(MachineFunction &MF) {
  LLVM_DEBUG(dbgs() << "****** Hexagon Branch Relaxation ******\n");

auto &HST = MF.getSubtarget<HexagonSubtarget>();
  HII = HST.getInstrInfo();
  HRI = HST.getRegisterInfo();

bool Changed = false;
  Changed = relaxBranches(MF);
  return Changed;
}

void HexagonBranchRelaxation::computeOffset(MachineFunction &MF,
      DenseMap<MachineBasicBlock*, unsigned> &OffsetMap) {
  // offset of the current instruction from the start.
  unsigned InstOffset = 0;
  for (auto &B : MF) {
    if (B.getAlignment() != Align(1)) {
      // Although we don't know the exact layout of the final code, we need
      // to account for alignment padding somehow. This heuristic pads each
      // aligned basic block according to the alignment value.
      InstOffset = alignTo(InstOffset, B.getAlignment());
    }
    OffsetMap[&B] = InstOffset;
    for (auto &MI : B.instrs()) {
      InstOffset += HII->getSize(MI);
      // Assume that all extendable branches will be extended.
      if (MI.isBranch() && HII->isExtendable(MI))
        InstOffset += HEXAGON_INSTR_SIZE;
    }
  }
}

/// relaxBranches - For Hexagon, if the jump target/loop label is too far from
/// the jump/loop instruction then, we need to make sure that we have constant
/// extenders set for jumps and loops.

/// There are six iterations in this phase. It's self explanatory below.
bool HexagonBranchRelaxation::relaxBranches(MachineFunction &MF) {
  // Compute the offset of each basic block
  // offset of the current instruction from the start.
  // map for each instruction to the beginning of the function
  DenseMap<MachineBasicBlock*, unsigned> BlockToInstOffset;
  computeOffset(MF, BlockToInstOffset);

return reGenerateBranch(MF, BlockToInstOffset);
}

/// Check if a given instruction is:
/// - a jump to a distant target
/// - that exceeds its immediate range
/// If both conditions are true, it requires constant extension.
bool HexagonBranchRelaxation::isJumpOutOfRange(MachineInstr &MI,
      DenseMap<MachineBasicBlock*, unsigned> &BlockToInstOffset) {
  MachineBasicBlock &B = *MI.getParent();
  auto FirstTerm = B.getFirstInstrTerminator();
  if (FirstTerm == B.instr_end())
    return false;

if (HII->isExtended(MI))
    return false;

unsigned InstOffset = BlockToInstOffset[&B];
  unsigned Distance = 0;

// To save time, estimate exact position of a branch instruction
  // as one at the end of the MBB.
  // Number of instructions times typical instruction size.
  InstOffset += HII->nonDbgBBSize(&B) * HEXAGON_INSTR_SIZE;

MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
  SmallVector<MachineOperand, 4> Cond;

// Try to analyze this branch.
  if (HII->analyzeBranch(B, TBB, FBB, Cond, false)) {
    // Could not analyze it. See if this is something we can recognize.
    // If it is a NVJ, it should always have its target in
    // a fixed location.
    if (HII->isNewValueJump(*FirstTerm))
      TBB = FirstTerm->getOperand(HII->getCExtOpNum(*FirstTerm)).getMBB();
  }
  if (TBB && &MI == &*FirstTerm) {
    Distance = std::abs((long long)InstOffset - BlockToInstOffset[TBB])
                + BranchRelaxSafetyBuffer;
    return !HII->isJumpWithinBranchRange(*FirstTerm, Distance);
  }
  if (FBB) {
    // Look for second terminator.
    auto SecondTerm = std::next(FirstTerm);
    assert(SecondTerm != B.instr_end() &&
          (SecondTerm->isBranch() || SecondTerm->isCall()) &&
          "Bad second terminator");
    if (&MI != &*SecondTerm)
      return false;
    // Analyze the second branch in the BB.
    Distance = std::abs((long long)InstOffset - BlockToInstOffset[FBB])
                + BranchRelaxSafetyBuffer;
    return !HII->isJumpWithinBranchRange(*SecondTerm, Distance);
  }
  return false;
}

bool HexagonBranchRelaxation::reGenerateBranch(MachineFunction &MF,
      DenseMap<MachineBasicBlock*, unsigned> &BlockToInstOffset) {
  bool Changed = false;

for (auto &B : MF) {
    for (auto &MI : B) {
      if (!MI.isBranch() || !isJumpOutOfRange(MI, BlockToInstOffset))
        continue;
      LLVM_DEBUG(dbgs() << "Long distance jump. isExtendable("
                        << HII->isExtendable(MI) << ") isConstExtended("
                        << HII->isConstExtended(MI) << ") " << MI);

// Since we have not merged HW loops relaxation into
      // this code (yet), soften our approach for the moment.
      if (!HII->isExtendable(MI) && !HII->isExtended(MI)) {
        LLVM_DEBUG(dbgs() << "\tUnderimplemented relax branch instruction.\n");
      } else {
        // Find which operand is expandable.
        int ExtOpNum = HII->getCExtOpNum(MI);
        MachineOperand &MO = MI.getOperand(ExtOpNum);
        // This need to be something we understand. So far we assume all
        // branches have only MBB address as expandable field.
        // If it changes, this will need to be expanded.
        assert(MO.isMBB() && "Branch with unknown expandable field type");
        // Mark given operand as extended.
        MO.addTargetFlag(HexagonII::HMOTF_ConstExtended);
        Changed = true;
      }
    }
  }
  return Changed;
}

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