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📁 ..
📄 ConstantPools.h(3.35 KB)
📄 LaneBitmask.h(3.24 KB)
📄 MCAsmBackend.h(8.09 KB)
📄 MCAsmInfo.h(25.48 KB)
📄 MCAsmInfoCOFF.h(900 B)
📄 MCAsmInfoDarwin.h(927 B)
📄 MCAsmInfoELF.h(711 B)
📄 MCAsmInfoWasm.h(612 B)
📄 MCAsmInfoXCOFF.h(792 B)
📄 MCAsmLayout.h(3.75 KB)
📄 MCAsmMacro.h(4.54 KB)
📄 MCAssembler.h(16.1 KB)
📄 MCCodeEmitter.h(1.53 KB)
📄 MCCodeView.h(9.03 KB)
📄 MCContext.h(31.99 KB)
📄 MCDirectives.h(3.12 KB)
📁 MCDisassembler
📄 MCDwarf.h(21.46 KB)
📄 MCELFObjectWriter.h(5.27 KB)
📄 MCELFStreamer.h(3.97 KB)
📄 MCExpr.h(21.55 KB)
📄 MCFixedLenDisassembler.h(1.39 KB)
📄 MCFixup.h(7.4 KB)
📄 MCFixupKindInfo.h(1.6 KB)
📄 MCFragment.h(17.72 KB)
📄 MCInst.h(6.06 KB)
📄 MCInstBuilder.h(1.76 KB)
📄 MCInstPrinter.h(5.88 KB)
📄 MCInstrAnalysis.h(6.8 KB)
📄 MCInstrDesc.h(25.13 KB)
📄 MCInstrInfo.h(2.93 KB)
📄 MCInstrItineraries.h(9.02 KB)
📄 MCLabel.h(1.63 KB)
📄 MCLinkerOptimizationHint.h(5.73 KB)
📄 MCMachObjectWriter.h(9.77 KB)
📄 MCObjectFileInfo.h(16.57 KB)
📄 MCObjectStreamer.h(8.78 KB)
📄 MCObjectWriter.h(4.44 KB)
📁 MCParser
📄 MCRegister.h(4.16 KB)
📄 MCRegisterInfo.h(28.96 KB)
📄 MCSchedule.h(16.25 KB)
📄 MCSection.h(6.52 KB)
📄 MCSectionCOFF.h(3.37 KB)
📄 MCSectionELF.h(3.3 KB)
📄 MCSectionMachO.h(3.15 KB)
📄 MCSectionWasm.h(2.78 KB)
📄 MCSectionXCOFF.h(3.22 KB)
📄 MCStreamer.h(43.55 KB)
📄 MCSubtargetInfo.h(10.04 KB)
📄 MCSymbol.h(13.8 KB)
📄 MCSymbolCOFF.h(1.62 KB)
📄 MCSymbolELF.h(1.45 KB)
📄 MCSymbolMachO.h(4.18 KB)
📄 MCSymbolWasm.h(4.28 KB)
📄 MCSymbolXCOFF.h(2.39 KB)
📄 MCTargetOptions.h(2.29 KB)
📄 MCTargetOptionsCommandFlags.h(1.26 KB)
📄 MCValue.h(2.42 KB)
📄 MCWasmObjectWriter.h(1.61 KB)
📄 MCWasmStreamer.h(2.83 KB)
📄 MCWin64EH.h(2.41 KB)
📄 MCWinCOFFObjectWriter.h(1.81 KB)
📄 MCWinCOFFStreamer.h(3.05 KB)
📄 MCWinEH.h(1.97 KB)
📄 MCXCOFFObjectWriter.h(1.45 KB)
📄 MCXCOFFStreamer.h(1.86 KB)
📄 MachineLocation.h(2.04 KB)
📄 SectionKind.h(7.53 KB)
📄 StringTableBuilder.h(2.47 KB)
📄 SubtargetFeature.h(7.12 KB)

Editing: MCInst.h

//===- llvm/MC/MCInst.h - MCInst class --------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the declaration of the MCInst and MCOperand classes, which
// is the basic representation used to represent low-level machine code
// instructions.
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_MC_MCINST_H
#define LLVM_MC_MCINST_H

#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/SMLoc.h"
#include <cassert>
#include <cstddef>
#include <cstdint>

namespace llvm {

class MCExpr;
class MCInst;
class MCInstPrinter;
class raw_ostream;

/// Instances of this class represent operands of the MCInst class.
/// This is a simple discriminated union.
class MCOperand {
  enum MachineOperandType : unsigned char {
    kInvalid,     ///< Uninitialized.
    kRegister,    ///< Register operand.
    kImmediate,   ///< Immediate operand.
    kFPImmediate, ///< Floating-point immediate operand.
    kExpr,        ///< Relocatable immediate operand.
    kInst         ///< Sub-instruction operand.
  };
  MachineOperandType Kind = kInvalid;

union {
    unsigned RegVal;
    int64_t ImmVal;
    double FPImmVal;
    const MCExpr *ExprVal;
    const MCInst *InstVal;
  };

public:
  MCOperand() : FPImmVal(0.0) {}

bool isValid() const { return Kind != kInvalid; }
  bool isReg() const { return Kind == kRegister; }
  bool isImm() const { return Kind == kImmediate; }
  bool isFPImm() const { return Kind == kFPImmediate; }
  bool isExpr() const { return Kind == kExpr; }
  bool isInst() const { return Kind == kInst; }

/// Returns the register number.
  unsigned getReg() const {
    assert(isReg() && "This is not a register operand!");
    return RegVal;
  }

/// Set the register number.
  void setReg(unsigned Reg) {
    assert(isReg() && "This is not a register operand!");
    RegVal = Reg;
  }

int64_t getImm() const {
    assert(isImm() && "This is not an immediate");
    return ImmVal;
  }

void setImm(int64_t Val) {
    assert(isImm() && "This is not an immediate");
    ImmVal = Val;
  }

double getFPImm() const {
    assert(isFPImm() && "This is not an FP immediate");
    return FPImmVal;
  }

void setFPImm(double Val) {
    assert(isFPImm() && "This is not an FP immediate");
    FPImmVal = Val;
  }

const MCExpr *getExpr() const {
    assert(isExpr() && "This is not an expression");
    return ExprVal;
  }

void setExpr(const MCExpr *Val) {
    assert(isExpr() && "This is not an expression");
    ExprVal = Val;
  }

const MCInst *getInst() const {
    assert(isInst() && "This is not a sub-instruction");
    return InstVal;
  }

void setInst(const MCInst *Val) {
    assert(isInst() && "This is not a sub-instruction");
    InstVal = Val;
  }

static MCOperand createReg(unsigned Reg) {
    MCOperand Op;
    Op.Kind = kRegister;
    Op.RegVal = Reg;
    return Op;
  }

static MCOperand createImm(int64_t Val) {
    MCOperand Op;
    Op.Kind = kImmediate;
    Op.ImmVal = Val;
    return Op;
  }

static MCOperand createFPImm(double Val) {
    MCOperand Op;
    Op.Kind = kFPImmediate;
    Op.FPImmVal = Val;
    return Op;
  }

static MCOperand createExpr(const MCExpr *Val) {
    MCOperand Op;
    Op.Kind = kExpr;
    Op.ExprVal = Val;
    return Op;
  }

static MCOperand createInst(const MCInst *Val) {
    MCOperand Op;
    Op.Kind = kInst;
    Op.InstVal = Val;
    return Op;
  }

void print(raw_ostream &OS) const;
  void dump() const;
  bool isBareSymbolRef() const;
  bool evaluateAsConstantImm(int64_t &Imm) const;
};

/// Instances of this class represent a single low-level machine
/// instruction.
class MCInst {
  unsigned Opcode = 0;
  // These flags could be used to pass some info from one target subcomponent
  // to another, for example, from disassembler to asm printer. The values of
  // the flags have any sense on target level only (e.g. prefixes on x86).
  unsigned Flags = 0;

SMLoc Loc;
  SmallVector<MCOperand, 8> Operands;

public:
  MCInst() = default;

void setOpcode(unsigned Op) { Opcode = Op; }
  unsigned getOpcode() const { return Opcode; }

void setFlags(unsigned F) { Flags = F; }
  unsigned getFlags() const { return Flags; }

void setLoc(SMLoc loc) { Loc = loc; }
  SMLoc getLoc() const { return Loc; }

const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
  MCOperand &getOperand(unsigned i) { return Operands[i]; }
  unsigned getNumOperands() const { return Operands.size(); }

void addOperand(const MCOperand &Op) { Operands.push_back(Op); }

using iterator = SmallVectorImpl<MCOperand>::iterator;
  using const_iterator = SmallVectorImpl<MCOperand>::const_iterator;

void clear() { Operands.clear(); }
  void erase(iterator I) { Operands.erase(I); }
  void erase(iterator First, iterator Last) { Operands.erase(First, Last); }
  size_t size() const { return Operands.size(); }
  iterator begin() { return Operands.begin(); }
  const_iterator begin() const { return Operands.begin(); }
  iterator end() { return Operands.end(); }
  const_iterator end() const { return Operands.end(); }

iterator insert(iterator I, const MCOperand &Op) {
    return Operands.insert(I, Op);
  }

void print(raw_ostream &OS) const;
  void dump() const;

/// Dump the MCInst as prettily as possible using the additional MC
  /// structures, if given. Operators are separated by the \p Separator
  /// string.
  void dump_pretty(raw_ostream &OS, const MCInstPrinter *Printer = nullptr,
                   StringRef Separator = " ") const;
  void dump_pretty(raw_ostream &OS, StringRef Name,
                   StringRef Separator = " ") const;
};

inline raw_ostream& operator<<(raw_ostream &OS, const MCOperand &MO) {
  MO.print(OS);
  return OS;
}

inline raw_ostream& operator<<(raw_ostream &OS, const MCInst &MI) {
  MI.print(OS);
  return OS;
}

} // end namespace llvm

#endif // LLVM_MC_MCINST_H

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