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AsmParser
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Disassembler
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MCTargetDesc
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MSP430.h
(1.32 KB)
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MSP430.td
(3.35 KB)
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MSP430AsmPrinter.cpp
(6.68 KB)
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MSP430BranchSelector.cpp
(8.62 KB)
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MSP430CallingConv.td
(1.49 KB)
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MSP430FrameLowering.cpp
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MSP430FrameLowering.h
(2.12 KB)
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MSP430ISelDAGToDAG.cpp
(14.46 KB)
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MSP430ISelLowering.cpp
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MSP430ISelLowering.h
(7.92 KB)
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MSP430InstrFormats.td
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MSP430InstrInfo.cpp
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MSP430InstrInfo.h
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MSP430InstrInfo.td
(43.85 KB)
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MSP430MCInstLower.cpp
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MSP430MCInstLower.h
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MSP430MachineFunctionInfo.cpp
(478 B)
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MSP430MachineFunctionInfo.h
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MSP430RegisterInfo.cpp
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MSP430RegisterInfo.h
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MSP430RegisterInfo.td
(3.19 KB)
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MSP430Subtarget.cpp
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MSP430Subtarget.h
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MSP430TargetMachine.cpp
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MSP430TargetMachine.h
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TargetInfo
Editing: MSP430InstrInfo.h
//===-- MSP430InstrInfo.h - MSP430 Instruction Information ------*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file contains the MSP430 implementation of the TargetInstrInfo class. // //===----------------------------------------------------------------------===// #ifndef LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H #define LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H #include "MSP430RegisterInfo.h" #include "llvm/CodeGen/TargetInstrInfo.h" #define GET_INSTRINFO_HEADER #include "MSP430GenInstrInfo.inc" namespace llvm { class MSP430Subtarget; class MSP430InstrInfo : public MSP430GenInstrInfo { const MSP430RegisterInfo RI; virtual void anchor(); public: explicit MSP430InstrInfo(MSP430Subtarget &STI); /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As /// such, whenever a client has an instance of instruction info, it should /// always be able to get register info as well (through this method). /// const TargetRegisterInfo &getRegisterInfo() const { return RI; } void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override; void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override; void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override; unsigned getInstSizeInBytes(const MachineInstr &MI) const override; // Branch folding goodness bool reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const override; unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved = nullptr) const override; unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded = nullptr) const override; int64_t getFramePoppedByCallee(const MachineInstr &I) const { assert(isFrameInstr(I) && "Not a frame instruction"); assert(I.getOperand(1).getImm() >= 0 && "Size must not be negative"); return I.getOperand(1).getImm(); } }; } #endif
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