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usr / src / contrib / llvm-project / llvm / lib / Target / Mips /

📁 ..
📁 AsmParser
📁 Disassembler
📁 MCTargetDesc
📄 MSA.txt(3.64 KB)
📄 MicroMips32r6InstrFormats.td(20.42 KB)
📄 MicroMips32r6InstrInfo.td(86.7 KB)
📄 MicroMipsDSPInstrFormats.td(6.55 KB)
📄 MicroMipsDSPInstrInfo.td(33.92 KB)
📄 MicroMipsInstrFPU.td(20.28 KB)
📄 MicroMipsInstrFormats.td(19.75 KB)
📄 MicroMipsInstrInfo.td(63.12 KB)
📄 MicroMipsSizeReduction.cpp(26.44 KB)
📄 Mips.h(1.85 KB)
📄 Mips.td(13.99 KB)
📄 Mips16FrameLowering.cpp(6.34 KB)
📄 Mips16FrameLowering.h(1.73 KB)
📄 Mips16HardFloat.cpp(15.87 KB)
📄 Mips16HardFloatInfo.cpp(1.45 KB)
📄 Mips16HardFloatInfo.h(1.33 KB)
📄 Mips16ISelDAGToDAG.cpp(7.33 KB)
📄 Mips16ISelDAGToDAG.h(1.8 KB)
📄 Mips16ISelLowering.cpp(29.05 KB)
📄 Mips16ISelLowering.h(3.29 KB)
📄 Mips16InstrFormats.td(16.29 KB)
📄 Mips16InstrInfo.cpp(17.93 KB)
📄 Mips16InstrInfo.h(5.33 KB)
📄 Mips16InstrInfo.td(51.26 KB)
📄 Mips16RegisterInfo.cpp(4.81 KB)
📄 Mips16RegisterInfo.h(1.56 KB)
📄 Mips32r6InstrFormats.td(14.85 KB)
📄 Mips32r6InstrInfo.td(47.55 KB)
📄 Mips64InstrInfo.td(58.62 KB)
📄 Mips64r6InstrInfo.td(15.93 KB)
📄 MipsAnalyzeImmediate.cpp(4.62 KB)
📄 MipsAnalyzeImmediate.h(2.24 KB)
📄 MipsAsmPrinter.cpp(43.89 KB)
📄 MipsAsmPrinter.h(6.04 KB)
📄 MipsBranchExpansion.cpp(29.72 KB)
📄 MipsCCState.cpp(6.71 KB)
📄 MipsCCState.h(6.14 KB)
📄 MipsCallLowering.cpp(23.62 KB)
📄 MipsCallLowering.h(3.35 KB)
📄 MipsCallingConv.td(17.55 KB)
📄 MipsCondMov.td(14.56 KB)
📄 MipsConstantIslandPass.cpp(62.17 KB)
📄 MipsDSPInstrFormats.td(7.39 KB)
📄 MipsDSPInstrInfo.td(68.68 KB)
📄 MipsDelaySlotFiller.cpp(32.55 KB)
📄 MipsEVAInstrFormats.td(2.51 KB)
📄 MipsEVAInstrInfo.td(8.52 KB)
📄 MipsExpandPseudo.cpp(30.1 KB)
📄 MipsFastISel.cpp(66.8 KB)
📄 MipsFrameLowering.cpp(5.75 KB)
📄 MipsFrameLowering.h(1.74 KB)
📄 MipsISelDAGToDAG.cpp(10.22 KB)
📄 MipsISelDAGToDAG.h(6.13 KB)
📄 MipsISelLowering.cpp(192.31 KB)
📄 MipsISelLowering.h(27.02 KB)
📄 MipsInstrFPU.td(44.82 KB)
📄 MipsInstrFormats.td(19.73 KB)
📄 MipsInstrInfo.cpp(28.1 KB)
📄 MipsInstrInfo.h(7.87 KB)
📄 MipsInstrInfo.td(138.02 KB)
📄 MipsInstructionSelector.cpp(34.44 KB)
📄 MipsLegalizerInfo.cpp(21.07 KB)
📄 MipsLegalizerInfo.h(1.19 KB)
📄 MipsMCInstLower.cpp(9.68 KB)
📄 MipsMCInstLower.h(1.77 KB)
📄 MipsMSAInstrFormats.td(9.18 KB)
📄 MipsMSAInstrInfo.td(182.92 KB)
📄 MipsMTInstrFormats.td(2.44 KB)
📄 MipsMTInstrInfo.td(7.59 KB)
📄 MipsMachineFunction.cpp(7.22 KB)
📄 MipsMachineFunction.h(4.37 KB)
📄 MipsModuleISelDAGToDAG.cpp(1.67 KB)
📄 MipsOptimizePICCall.cpp(9.78 KB)
📄 MipsOptionRecord.h(2.9 KB)
📄 MipsOs16.cpp(4.18 KB)
📄 MipsPfmCounters.td(706 B)
📄 MipsPreLegalizerCombiner.cpp(3.93 KB)
📄 MipsRegisterBankInfo.cpp(26.01 KB)
📄 MipsRegisterBankInfo.h(9.13 KB)
📄 MipsRegisterBanks.td(573 B)
📄 MipsRegisterInfo.cpp(10.41 KB)
📄 MipsRegisterInfo.h(2.82 KB)
📄 MipsRegisterInfo.td(23.18 KB)
📄 MipsSEFrameLowering.cpp(34.47 KB)
📄 MipsSEFrameLowering.h(1.88 KB)
📄 MipsSEISelDAGToDAG.cpp(49.41 KB)
📄 MipsSEISelDAGToDAG.h(5.92 KB)
📄 MipsSEISelLowering.cpp(140.76 KB)
📄 MipsSEISelLowering.h(6.25 KB)
📄 MipsSEInstrInfo.cpp(34.71 KB)
📄 MipsSEInstrInfo.h(5.34 KB)
📄 MipsSERegisterInfo.cpp(8.44 KB)
📄 MipsSERegisterInfo.h(1.2 KB)
📄 MipsSchedule.td(38.24 KB)
📄 MipsScheduleGeneric.td(71.71 KB)
📄 MipsScheduleP5600.td(27.85 KB)
📄 MipsSubtarget.cpp(10.72 KB)
📄 MipsSubtarget.h(13.43 KB)
📄 MipsTargetMachine.cpp(12.66 KB)
📄 MipsTargetMachine.h(3.08 KB)
📄 MipsTargetObjectFile.cpp(7.39 KB)
📄 MipsTargetObjectFile.h(2.02 KB)
📄 MipsTargetStreamer.h(14.58 KB)
📄 Relocation.txt(3.91 KB)
📁 TargetInfo

Editing: MicroMipsDSPInstrFormats.td

//===-- MicroMipsDSPInstrFormats.td - Instruction Formats --*- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

class MMDSPInst<string opstr = "">
    : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> {
  let ASEPredicate = [HasDSP];
  let EncodingPredicates = [InMicroMips];
  string BaseOpcode = opstr;
  string Arch = "mmdsp";
  let DecoderNamespace = "MicroMips";
}

class MMDSPInstAlias<string Asm, dag Result, bit Emit = 0b1>
    : InstAlias<Asm, Result, Emit>, PredicateControl {
  let ASEPredicate = [HasDSP];
  let AdditionalPredicates = [InMicroMips];
}

class POOL32A_3R_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
  bits<5> rd;
  bits<5> rs;
  bits<5> rt;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-11} = rd;
  let Inst{10-0}  = op;
}

class POOL32A_2R_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> rs;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-6}  = op;
  let Inst{5-0}   = 0b111100;
}

class POOL32A_2RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> rs;
  bits<2> ac;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-14} = ac;
  let Inst{13-6}  = op;
  let Inst{5-0}   = 0b111100;
}

class POOL32A_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
  bits<5> rd;
  bits<5> rs;
  bits<5> rt;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-11} = rd;
  let Inst{10}    = 0b0;
  let Inst{9-0}   = op;
}

class POOL32A_2RSA4_FMT<string opstr, bits<12> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> rs;
  bits<4> sa;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-12} = sa;
  let Inst{11-0}  = op;
}

class POOL32A_2RSA3_FMT<string opstr, bits<7> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> rs;
  bits<3> sa;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-13} = sa;
  let Inst{12-6}  = op;
  let Inst{5-0}   = 0b111100;
}

class POOL32A_2RSA5B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> rs;
  bits<5> sa;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-11} = sa;
  let Inst{10}    = 0b0;
  let Inst{9-0}   = op;
}

class POOL32A_2RSA4B0_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> rs;
  bits<4> sa;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-12} = sa;
  let Inst{11}    = 0b0;
  let Inst{10-0}  = op;
}

class POOL32A_2RSA4OP6_FMT<string opstr, bits<6> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> rs;
  bits<4> sa;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-12} = sa;
  let Inst{11-6}  = op;
  let Inst{5-0}   = 0b111100;
}

class POOL32A_1RIMM5AC_FMT<string opstr, bits<8> funct> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> imm;
  bits<2> ac;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = rt;
  let Inst{20-16} = imm;
  let Inst{15-14} = ac;
  let Inst{13-6}  = funct;
  let Inst{5-0}   = 0b111100;
}

class POOL32A_2RSA5_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> rs;
  bits<5> sa;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-11} = sa;
  let Inst{10-0}  = op;
}

class POOL32A_1RMEMB0_FMT<string opstr, bits<10> funct> : MMDSPInst<opstr> {
  bits<5> index;
  bits<5> base;
  bits<5> rd;

let Inst{31-26} = 0;
  let Inst{25-21} = index;
  let Inst{20-16} = base;
  let Inst{15-11} = rd;
  let Inst{10}    = 0b0;
  let Inst{9-0}   = funct;
}

class POOL32A_1RAC_FMT<string instr_asm, bits<8> funct> : MMDSPInst<instr_asm> {
  bits<5> rs;
  bits<2> ac;

let Inst{31-26} = 0;
  let Inst{25-21} = 0;
  let Inst{20-16} = rs;
  let Inst{15-14} = ac;
  let Inst{13-6}  = funct;
  let Inst{5-0}   = 0b111100;
}

class POOL32A_1RMASK7_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<7> mask;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = rt;
  let Inst{20-14} = mask;
  let Inst{13-6}  = op;
  let Inst{5-0}   = 0b111100;
}

class POOL32A_1RIMM10_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
  bits<5> rd;
  bits<10> imm;

let Inst{31-26} = 0;
  let Inst{25-16} = imm;
  let Inst{15-11} = rd;
  let Inst{10}    = 0;
  let Inst{9-0}   = op;
}

class POOL32A_1RIMM8_FMT<string opstr, bits<6> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<8> imm;

let Inst{31-26} = 0;
  let Inst{25-21} = rt;
  let Inst{20-13} = imm;
  let Inst{12}    = 0;
  let Inst{11-6}  = op;
  let Inst{5-0}   = 0b111100;
}

class POOL32A_4B0SHIFT6AC4B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
  bits<6> shift;
  bits<2> ac;

let Inst{31-26} = 0b000000;
  let Inst{25-22} = 0b0000;
  let Inst{21-16} = shift;
  let Inst{15-14} = ac;
  let Inst{13-10} = 0b0000;
  let Inst{9-0}   = op;
}

class POOL32A_5B01RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {
  bits<5> rs;
  bits<2> ac;

let Inst{31-26} = 0b000000;
  let Inst{25-21} = 0b00000;
  let Inst{20-16} = rs;
  let Inst{15-14} = ac;
  let Inst{13-6}  = op;
  let Inst{5-0}   = 0b111100;
}

class POOL32I_IMMB0_FMT<string opstr, bits<5> op> : MMDSPInst<opstr> {
  bits<16> offset;

let Inst{31-26} = 0b010000;
  let Inst{25-21} = op;
  let Inst{20-16} = 0;
  let Inst{15-0}  = offset;
}

class POOL32A_2RBP_FMT<string opstr> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> rs;
  bits<2> bp;

let Inst{31-26} = 0;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-14} = bp;
  let Inst{13-6}  = 0b00100010;
  let Inst{5-0}   = 0b111100;
}

class POOL32A_2RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> rs;

let Inst{31-26} = 0;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-10} = 0;
  let Inst{9-0}   = op;
}

class POOL32S_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> rs;
  bits<5> rd;

let Inst{31-26} = 0b010110;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-11} = rd;
  let Inst{10}    = 0b0;
  let Inst{9-0}   = op;
}

class POOL32A_2R2B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
  bits<5> rt;
  bits<5> rs;

let Inst{31-26} = 0;
  let Inst{25-21} = rt;
  let Inst{20-16} = rs;
  let Inst{15-11} = 0;
  let Inst{10}    = 0;
  let Inst{9-0}   = op;
}

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Editing: MicroMipsDSPInstrFormats.td

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