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📁 ..
📄 MipsABIFlagsSection.cpp(2.51 KB)
📄 MipsABIFlagsSection.h(5.84 KB)
📄 MipsABIInfo.cpp(3.7 KB)
📄 MipsABIInfo.h(2.59 KB)
📄 MipsAsmBackend.cpp(24.31 KB)
📄 MipsAsmBackend.h(2.73 KB)
📄 MipsBaseInfo.h(4.46 KB)
📄 MipsELFObjectWriter.cpp(24.29 KB)
📄 MipsELFStreamer.cpp(3.83 KB)
📄 MipsELFStreamer.h(3.34 KB)
📄 MipsFixupKinds.h(5.86 KB)
📄 MipsInstPrinter.cpp(8.25 KB)
📄 MipsInstPrinter.h(3.51 KB)
📄 MipsMCAsmInfo.cpp(1.86 KB)
📄 MipsMCAsmInfo.h(926 B)
📄 MipsMCCodeEmitter.cpp(40.54 KB)
📄 MipsMCCodeEmitter.h(13.69 KB)
📄 MipsMCExpr.cpp(7.94 KB)
📄 MipsMCExpr.h(2.42 KB)
📄 MipsMCNaCl.h(1.24 KB)
📄 MipsMCTargetDesc.cpp(7.15 KB)
📄 MipsMCTargetDesc.h(2.04 KB)
📄 MipsNaClELFStreamer.cpp(8.86 KB)
📄 MipsOptionRecord.cpp(3.57 KB)
📄 MipsTargetStreamer.cpp(45.07 KB)

Editing: MipsAsmBackend.h

//===-- MipsAsmBackend.h - Mips Asm Backend  ------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the MipsAsmBackend class.
//
//===----------------------------------------------------------------------===//
//

#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H
#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H

#include "MCTargetDesc/MipsFixupKinds.h"
#include "llvm/ADT/Triple.h"
#include "llvm/MC/MCAsmBackend.h"

namespace llvm {

class MCAssembler;
struct MCFixupKindInfo;
class MCRegisterInfo;
class Target;

class MipsAsmBackend : public MCAsmBackend {
  Triple TheTriple;
  bool IsN32;

public:
  MipsAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT,
                 StringRef CPU, bool N32)
      : MCAsmBackend(TT.isLittleEndian() ? support::little : support::big),
        TheTriple(TT), IsN32(N32) {}

std::unique_ptr<MCObjectTargetWriter>
  createObjectTargetWriter() const override;

void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
                  const MCValue &Target, MutableArrayRef<char> Data,
                  uint64_t Value, bool IsResolved,
                  const MCSubtargetInfo *STI) const override;

Optional<MCFixupKind> getFixupKind(StringRef Name) const override;
  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;

unsigned getNumFixupKinds() const override {
    return Mips::NumTargetFixupKinds;
  }

/// @name Target Relaxation Interfaces
  /// @{

/// MayNeedRelaxation - Check whether the given instruction may need
  /// relaxation.
  ///
  /// \param Inst - The instruction to test.
  bool mayNeedRelaxation(const MCInst &Inst,
                         const MCSubtargetInfo &STI) const override {
    return false;
  }

/// fixupNeedsRelaxation - Target specific predicate for whether a given
  /// fixup requires the associated instruction to be relaxed.
  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
                            const MCRelaxableFragment *DF,
                            const MCAsmLayout &Layout) const override {
    // FIXME.
    llvm_unreachable("RelaxInstruction() unimplemented");
    return false;
  }

bool writeNopData(raw_ostream &OS, uint64_t Count) const override;

bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
                             const MCValue &Target) override;

bool isMicroMips(const MCSymbol *Sym) const override;
}; // class MipsAsmBackend

} // namespace

#endif

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