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AsmParser
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Disassembler
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MCTargetDesc
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MSA.txt
(3.64 KB)
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MicroMips32r6InstrFormats.td
(20.42 KB)
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MicroMips32r6InstrInfo.td
(86.7 KB)
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MicroMipsDSPInstrFormats.td
(6.55 KB)
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MicroMipsDSPInstrInfo.td
(33.92 KB)
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MicroMipsInstrFPU.td
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MicroMipsInstrFormats.td
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MicroMipsInstrInfo.td
(63.12 KB)
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MicroMipsSizeReduction.cpp
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Mips.h
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Mips.td
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Mips16FrameLowering.cpp
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Mips16FrameLowering.h
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Mips16HardFloat.cpp
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Mips16HardFloatInfo.cpp
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Mips16HardFloatInfo.h
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Mips16ISelDAGToDAG.cpp
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Mips16ISelDAGToDAG.h
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Mips16ISelLowering.cpp
(29.05 KB)
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Mips16ISelLowering.h
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Mips16InstrFormats.td
(16.29 KB)
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Mips16InstrInfo.cpp
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Mips16InstrInfo.h
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Mips16InstrInfo.td
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Mips16RegisterInfo.cpp
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Mips16RegisterInfo.h
(1.56 KB)
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Mips32r6InstrFormats.td
(14.85 KB)
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Mips32r6InstrInfo.td
(47.55 KB)
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Mips64InstrInfo.td
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Mips64r6InstrInfo.td
(15.93 KB)
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MipsAnalyzeImmediate.cpp
(4.62 KB)
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MipsAnalyzeImmediate.h
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MipsAsmPrinter.cpp
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MipsAsmPrinter.h
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MipsBranchExpansion.cpp
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MipsCCState.cpp
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MipsCCState.h
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MipsCallLowering.cpp
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MipsCallLowering.h
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MipsCallingConv.td
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MipsCondMov.td
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MipsConstantIslandPass.cpp
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MipsDSPInstrFormats.td
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MipsDSPInstrInfo.td
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MipsDelaySlotFiller.cpp
(32.55 KB)
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MipsEVAInstrFormats.td
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MipsEVAInstrInfo.td
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MipsExpandPseudo.cpp
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MipsFastISel.cpp
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MipsFrameLowering.cpp
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MipsFrameLowering.h
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MipsISelDAGToDAG.cpp
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MipsISelDAGToDAG.h
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MipsISelLowering.cpp
(192.31 KB)
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MipsISelLowering.h
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MipsInstrFPU.td
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MipsInstrFormats.td
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MipsInstrInfo.cpp
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MipsInstrInfo.h
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MipsInstrInfo.td
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MipsInstructionSelector.cpp
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MipsLegalizerInfo.cpp
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MipsLegalizerInfo.h
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MipsMCInstLower.cpp
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MipsMCInstLower.h
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MipsMSAInstrFormats.td
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MipsMSAInstrInfo.td
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MipsMTInstrFormats.td
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MipsMTInstrInfo.td
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MipsMachineFunction.cpp
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MipsMachineFunction.h
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MipsModuleISelDAGToDAG.cpp
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MipsOptimizePICCall.cpp
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MipsOptionRecord.h
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MipsOs16.cpp
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MipsPfmCounters.td
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MipsPreLegalizerCombiner.cpp
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MipsRegisterBankInfo.cpp
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MipsRegisterBankInfo.h
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MipsRegisterBanks.td
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MipsRegisterInfo.cpp
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MipsRegisterInfo.h
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MipsRegisterInfo.td
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MipsSEFrameLowering.cpp
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MipsSEFrameLowering.h
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MipsSEISelDAGToDAG.cpp
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MipsSEISelDAGToDAG.h
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MipsSEISelLowering.cpp
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MipsSEISelLowering.h
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MipsSEInstrInfo.cpp
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MipsSEInstrInfo.h
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MipsSERegisterInfo.cpp
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MipsSERegisterInfo.h
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MipsSchedule.td
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MipsScheduleGeneric.td
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MipsScheduleP5600.td
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MipsSubtarget.cpp
(10.72 KB)
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MipsSubtarget.h
(13.43 KB)
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MipsTargetMachine.cpp
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MipsTargetMachine.h
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MipsTargetObjectFile.cpp
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MipsTargetObjectFile.h
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MipsTargetStreamer.h
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Relocation.txt
(3.91 KB)
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TargetInfo
Editing: MipsCallLowering.h
//===- MipsCallLowering.h ---------------------------------------*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // /// \file /// This file describes how to lower LLVM calls to machine code calls. // //===----------------------------------------------------------------------===// #ifndef LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H #define LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H #include "llvm/CodeGen/GlobalISel/CallLowering.h" namespace llvm { class MipsTargetLowering; class MipsCallLowering : public CallLowering { public: class MipsHandler { public: MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) : MIRBuilder(MIRBuilder), MRI(MRI) {} virtual ~MipsHandler() = default; bool handle(ArrayRef<CCValAssign> ArgLocs, ArrayRef<CallLowering::ArgInfo> Args); protected: bool assignVRegs(ArrayRef<Register> VRegs, ArrayRef<CCValAssign> ArgLocs, unsigned ArgLocsStartIndex, const EVT &VT); void setLeastSignificantFirst(SmallVectorImpl<Register> &VRegs); MachineIRBuilder &MIRBuilder; MachineRegisterInfo &MRI; private: bool assign(Register VReg, const CCValAssign &VA, const EVT &VT); virtual Register getStackAddress(const CCValAssign &VA, MachineMemOperand *&MMO) = 0; virtual void assignValueToReg(Register ValVReg, const CCValAssign &VA, const EVT &VT) = 0; virtual void assignValueToAddress(Register ValVReg, const CCValAssign &VA) = 0; virtual bool handleSplit(SmallVectorImpl<Register> &VRegs, ArrayRef<CCValAssign> ArgLocs, unsigned ArgLocsStartIndex, Register ArgsReg, const EVT &VT) = 0; }; MipsCallLowering(const MipsTargetLowering &TLI); bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs) const override; bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef<ArrayRef<Register>> VRegs) const override; bool lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const override; private: /// Based on registers available on target machine split or extend /// type if needed, also change pointer type to appropriate integer /// type. template <typename T> void subTargetRegTypeForCallingConv(const Function &F, ArrayRef<ArgInfo> Args, ArrayRef<unsigned> OrigArgIndices, SmallVectorImpl<T> &ISDArgs) const; /// Split structures and arrays, save original argument indices since /// Mips calling convention needs info about original argument type. void splitToValueTypes(const DataLayout &DL, const ArgInfo &OrigArg, unsigned OriginalIndex, SmallVectorImpl<ArgInfo> &SplitArgs, SmallVectorImpl<unsigned> &SplitArgsOrigIndices) const; }; } // end namespace llvm #endif // LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
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