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usr / src / contrib / llvm-project / llvm / lib / Target / Mips /

📁 ..
📁 AsmParser
📁 Disassembler
📁 MCTargetDesc
📄 MSA.txt(3.64 KB)
📄 MicroMips32r6InstrFormats.td(20.42 KB)
📄 MicroMips32r6InstrInfo.td(86.7 KB)
📄 MicroMipsDSPInstrFormats.td(6.55 KB)
📄 MicroMipsDSPInstrInfo.td(33.92 KB)
📄 MicroMipsInstrFPU.td(20.28 KB)
📄 MicroMipsInstrFormats.td(19.75 KB)
📄 MicroMipsInstrInfo.td(63.12 KB)
📄 MicroMipsSizeReduction.cpp(26.44 KB)
📄 Mips.h(1.85 KB)
📄 Mips.td(13.99 KB)
📄 Mips16FrameLowering.cpp(6.34 KB)
📄 Mips16FrameLowering.h(1.73 KB)
📄 Mips16HardFloat.cpp(15.87 KB)
📄 Mips16HardFloatInfo.cpp(1.45 KB)
📄 Mips16HardFloatInfo.h(1.33 KB)
📄 Mips16ISelDAGToDAG.cpp(7.33 KB)
📄 Mips16ISelDAGToDAG.h(1.8 KB)
📄 Mips16ISelLowering.cpp(29.05 KB)
📄 Mips16ISelLowering.h(3.29 KB)
📄 Mips16InstrFormats.td(16.29 KB)
📄 Mips16InstrInfo.cpp(17.93 KB)
📄 Mips16InstrInfo.h(5.33 KB)
📄 Mips16InstrInfo.td(51.26 KB)
📄 Mips16RegisterInfo.cpp(4.81 KB)
📄 Mips16RegisterInfo.h(1.56 KB)
📄 Mips32r6InstrFormats.td(14.85 KB)
📄 Mips32r6InstrInfo.td(47.55 KB)
📄 Mips64InstrInfo.td(58.62 KB)
📄 Mips64r6InstrInfo.td(15.93 KB)
📄 MipsAnalyzeImmediate.cpp(4.62 KB)
📄 MipsAnalyzeImmediate.h(2.24 KB)
📄 MipsAsmPrinter.cpp(43.89 KB)
📄 MipsAsmPrinter.h(6.04 KB)
📄 MipsBranchExpansion.cpp(29.72 KB)
📄 MipsCCState.cpp(6.71 KB)
📄 MipsCCState.h(6.14 KB)
📄 MipsCallLowering.cpp(23.62 KB)
📄 MipsCallLowering.h(3.35 KB)
📄 MipsCallingConv.td(17.55 KB)
📄 MipsCondMov.td(14.56 KB)
📄 MipsConstantIslandPass.cpp(62.17 KB)
📄 MipsDSPInstrFormats.td(7.39 KB)
📄 MipsDSPInstrInfo.td(68.68 KB)
📄 MipsDelaySlotFiller.cpp(32.55 KB)
📄 MipsEVAInstrFormats.td(2.51 KB)
📄 MipsEVAInstrInfo.td(8.52 KB)
📄 MipsExpandPseudo.cpp(30.1 KB)
📄 MipsFastISel.cpp(66.8 KB)
📄 MipsFrameLowering.cpp(5.75 KB)
📄 MipsFrameLowering.h(1.74 KB)
📄 MipsISelDAGToDAG.cpp(10.22 KB)
📄 MipsISelDAGToDAG.h(6.13 KB)
📄 MipsISelLowering.cpp(192.31 KB)
📄 MipsISelLowering.h(27.02 KB)
📄 MipsInstrFPU.td(44.82 KB)
📄 MipsInstrFormats.td(19.73 KB)
📄 MipsInstrInfo.cpp(28.1 KB)
📄 MipsInstrInfo.h(7.87 KB)
📄 MipsInstrInfo.td(138.02 KB)
📄 MipsInstructionSelector.cpp(34.44 KB)
📄 MipsLegalizerInfo.cpp(21.07 KB)
📄 MipsLegalizerInfo.h(1.19 KB)
📄 MipsMCInstLower.cpp(9.68 KB)
📄 MipsMCInstLower.h(1.77 KB)
📄 MipsMSAInstrFormats.td(9.18 KB)
📄 MipsMSAInstrInfo.td(182.92 KB)
📄 MipsMTInstrFormats.td(2.44 KB)
📄 MipsMTInstrInfo.td(7.59 KB)
📄 MipsMachineFunction.cpp(7.22 KB)
📄 MipsMachineFunction.h(4.37 KB)
📄 MipsModuleISelDAGToDAG.cpp(1.67 KB)
📄 MipsOptimizePICCall.cpp(9.78 KB)
📄 MipsOptionRecord.h(2.9 KB)
📄 MipsOs16.cpp(4.18 KB)
📄 MipsPfmCounters.td(706 B)
📄 MipsPreLegalizerCombiner.cpp(3.93 KB)
📄 MipsRegisterBankInfo.cpp(26.01 KB)
📄 MipsRegisterBankInfo.h(9.13 KB)
📄 MipsRegisterBanks.td(573 B)
📄 MipsRegisterInfo.cpp(10.41 KB)
📄 MipsRegisterInfo.h(2.82 KB)
📄 MipsRegisterInfo.td(23.18 KB)
📄 MipsSEFrameLowering.cpp(34.47 KB)
📄 MipsSEFrameLowering.h(1.88 KB)
📄 MipsSEISelDAGToDAG.cpp(49.41 KB)
📄 MipsSEISelDAGToDAG.h(5.92 KB)
📄 MipsSEISelLowering.cpp(140.76 KB)
📄 MipsSEISelLowering.h(6.25 KB)
📄 MipsSEInstrInfo.cpp(34.71 KB)
📄 MipsSEInstrInfo.h(5.34 KB)
📄 MipsSERegisterInfo.cpp(8.44 KB)
📄 MipsSERegisterInfo.h(1.2 KB)
📄 MipsSchedule.td(38.24 KB)
📄 MipsScheduleGeneric.td(71.71 KB)
📄 MipsScheduleP5600.td(27.85 KB)
📄 MipsSubtarget.cpp(10.72 KB)
📄 MipsSubtarget.h(13.43 KB)
📄 MipsTargetMachine.cpp(12.66 KB)
📄 MipsTargetMachine.h(3.08 KB)
📄 MipsTargetObjectFile.cpp(7.39 KB)
📄 MipsTargetObjectFile.h(2.02 KB)
📄 MipsTargetStreamer.h(14.58 KB)
📄 Relocation.txt(3.91 KB)
📁 TargetInfo

Editing: MipsFrameLowering.cpp

//===-- MipsFrameLowering.cpp - Mips Frame Information --------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the Mips implementation of TargetFrameLowering class.
//
//===----------------------------------------------------------------------===//

#include "MipsFrameLowering.h"
#include "MCTargetDesc/MipsBaseInfo.h"
#include "MipsInstrInfo.h"
#include "MipsMachineFunction.h"
#include "MipsTargetMachine.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/Function.h"
#include "llvm/Target/TargetOptions.h"

using namespace llvm;

//===----------------------------------------------------------------------===//
//
// Stack Frame Processing methods
// +----------------------------+
//
// The stack is allocated decrementing the stack pointer on
// the first instruction of a function prologue. Once decremented,
// all stack references are done thought a positive offset
// from the stack/frame pointer, so the stack is considering
// to grow up! Otherwise terrible hacks would have to be made
// to get this stack ABI compliant :)
//
//  The stack frame required by the ABI (after call):
//  Offset
//
//  0                 ----------
//  4                 Args to pass
//  .                 saved $GP  (used in PIC)
//  .                 Alloca allocations
//  .                 Local Area
//  .                 CPU "Callee Saved" Registers
//  .                 saved FP
//  .                 saved RA
//  .                 FPU "Callee Saved" Registers
//  StackSize         -----------
//
// Offset - offset from sp after stack allocation on function prologue
//
// The sp is the stack pointer subtracted/added from the stack size
// at the Prologue/Epilogue
//
// References to the previous stack (to obtain arguments) are done
// with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1))
//
// Examples:
// - reference to the actual stack frame
//   for any local area var there is smt like : FI >= 0, StackOffset: 4
//     sw REGX, 4(SP)
//
// - reference to previous stack frame
//   suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16.
//   The emitted instruction will be something like:
//     lw REGX, 16+StackSize(SP)
//
// Since the total stack size is unknown on LowerFormalArguments, all
// stack references (ObjectOffset) created to reference the function
// arguments, are negative numbers. This way, on eliminateFrameIndex it's
// possible to detect those references and the offsets are adjusted to
// their real location.
//
//===----------------------------------------------------------------------===//

const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) {
  if (ST.inMips16Mode())
    return llvm::createMips16FrameLowering(ST);

return llvm::createMipsSEFrameLowering(ST);
}

// hasFP - Return true if the specified function should have a dedicated frame
// pointer register.  This is true if the function has variable sized allocas,
// if it needs dynamic stack realignment, if frame pointer elimination is
// disabled, or if the frame address is taken.
bool MipsFrameLowering::hasFP(const MachineFunction &MF) const {
  const MachineFrameInfo &MFI = MF.getFrameInfo();
  const TargetRegisterInfo *TRI = STI.getRegisterInfo();

return MF.getTarget().Options.DisableFramePointerElim(MF) ||
      MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() ||
      TRI->needsStackRealignment(MF);
}

bool MipsFrameLowering::hasBP(const MachineFunction &MF) const {
  const MachineFrameInfo &MFI = MF.getFrameInfo();
  const TargetRegisterInfo *TRI = STI.getRegisterInfo();

return MFI.hasVarSizedObjects() && TRI->needsStackRealignment(MF);
}

// Estimate the size of the stack, including the incoming arguments. We need to
// account for register spills, local objects, reserved call frame and incoming
// arguments. This is required to determine the largest possible positive offset
// from $sp so that it can be determined if an emergency spill slot for stack
// addresses is required.
uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const {
  const MachineFrameInfo &MFI = MF.getFrameInfo();
  const TargetRegisterInfo &TRI = *STI.getRegisterInfo();

int64_t Size = 0;

// Iterate over fixed sized objects which are incoming arguments.
  for (int I = MFI.getObjectIndexBegin(); I != 0; ++I)
    if (MFI.getObjectOffset(I) > 0)
      Size += MFI.getObjectSize(I);

// Conservatively assume all callee-saved registers will be saved.
  for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) {
    unsigned RegSize = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R));
    Size = alignTo(Size + RegSize, RegSize);
  }

// Get the size of the rest of the frame objects and any possible reserved
  // call frame, accounting for alignment.
  return Size + MFI.estimateStackSize(MF);
}

// Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions
MachineBasicBlock::iterator MipsFrameLowering::
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
                              MachineBasicBlock::iterator I) const {
  unsigned SP = STI.getABI().IsN64() ? Mips::SP_64 : Mips::SP;

if (!hasReservedCallFrame(MF)) {
    int64_t Amount = I->getOperand(0).getImm();
    if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
      Amount = -Amount;

STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I);
  }

return MBB.erase(I);
}

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Editing: MipsFrameLowering.cpp

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