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usr / src / contrib / llvm-project / llvm / lib / Target / Mips / MCTargetDesc /

📁 ..
📄 MipsABIFlagsSection.cpp(2.51 KB)
📄 MipsABIFlagsSection.h(5.84 KB)
📄 MipsABIInfo.cpp(3.7 KB)
📄 MipsABIInfo.h(2.59 KB)
📄 MipsAsmBackend.cpp(24.31 KB)
📄 MipsAsmBackend.h(2.73 KB)
📄 MipsBaseInfo.h(4.46 KB)
📄 MipsELFObjectWriter.cpp(24.29 KB)
📄 MipsELFStreamer.cpp(3.83 KB)
📄 MipsELFStreamer.h(3.34 KB)
📄 MipsFixupKinds.h(5.86 KB)
📄 MipsInstPrinter.cpp(8.25 KB)
📄 MipsInstPrinter.h(3.51 KB)
📄 MipsMCAsmInfo.cpp(1.86 KB)
📄 MipsMCAsmInfo.h(926 B)
📄 MipsMCCodeEmitter.cpp(40.54 KB)
📄 MipsMCCodeEmitter.h(13.69 KB)
📄 MipsMCExpr.cpp(7.94 KB)
📄 MipsMCExpr.h(2.42 KB)
📄 MipsMCNaCl.h(1.24 KB)
📄 MipsMCTargetDesc.cpp(7.15 KB)
📄 MipsMCTargetDesc.h(2.04 KB)
📄 MipsNaClELFStreamer.cpp(8.86 KB)
📄 MipsOptionRecord.cpp(3.57 KB)
📄 MipsTargetStreamer.cpp(45.07 KB)

Editing: MipsMCTargetDesc.h

//===-- MipsMCTargetDesc.h - Mips Target Descriptions -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides Mips specific target descriptions.
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H

#include "llvm/Support/DataTypes.h"

#include <memory>

namespace llvm {
class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectTargetWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class MCTargetOptions;
class StringRef;
class Target;
class Triple;

MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
                                         const MCRegisterInfo &MRI,
                                         MCContext &Ctx);
MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
                                         const MCRegisterInfo &MRI,
                                         MCContext &Ctx);

MCAsmBackend *createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI,
                                   const MCRegisterInfo &MRI,
                                   const MCTargetOptions &Options);

std::unique_ptr<MCObjectTargetWriter>
createMipsELFObjectWriter(const Triple &TT, bool IsN32);

namespace MIPS_MC {
StringRef selectMipsCPU(const Triple &TT, StringRef CPU);
}

} // End llvm namespace

// Defines symbolic names for Mips registers.  This defines a mapping from
// register name to register number.
#define GET_REGINFO_ENUM
#include "MipsGenRegisterInfo.inc"

// Defines symbolic names for the Mips instructions.
#define GET_INSTRINFO_ENUM
#include "MipsGenInstrInfo.inc"

#define GET_SUBTARGETINFO_ENUM
#include "MipsGenSubtargetInfo.inc"

#endif

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Editing: MipsMCTargetDesc.h

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