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usr / src / contrib / llvm-project / llvm / lib / Target / Mips /

📁 ..
📁 AsmParser
📁 Disassembler
📁 MCTargetDesc
📄 MSA.txt(3.64 KB)
📄 MicroMips32r6InstrFormats.td(20.42 KB)
📄 MicroMips32r6InstrInfo.td(86.7 KB)
📄 MicroMipsDSPInstrFormats.td(6.55 KB)
📄 MicroMipsDSPInstrInfo.td(33.92 KB)
📄 MicroMipsInstrFPU.td(20.28 KB)
📄 MicroMipsInstrFormats.td(19.75 KB)
📄 MicroMipsInstrInfo.td(63.12 KB)
📄 MicroMipsSizeReduction.cpp(26.44 KB)
📄 Mips.h(1.85 KB)
📄 Mips.td(13.99 KB)
📄 Mips16FrameLowering.cpp(6.34 KB)
📄 Mips16FrameLowering.h(1.73 KB)
📄 Mips16HardFloat.cpp(15.87 KB)
📄 Mips16HardFloatInfo.cpp(1.45 KB)
📄 Mips16HardFloatInfo.h(1.33 KB)
📄 Mips16ISelDAGToDAG.cpp(7.33 KB)
📄 Mips16ISelDAGToDAG.h(1.8 KB)
📄 Mips16ISelLowering.cpp(29.05 KB)
📄 Mips16ISelLowering.h(3.29 KB)
📄 Mips16InstrFormats.td(16.29 KB)
📄 Mips16InstrInfo.cpp(17.93 KB)
📄 Mips16InstrInfo.h(5.33 KB)
📄 Mips16InstrInfo.td(51.26 KB)
📄 Mips16RegisterInfo.cpp(4.81 KB)
📄 Mips16RegisterInfo.h(1.56 KB)
📄 Mips32r6InstrFormats.td(14.85 KB)
📄 Mips32r6InstrInfo.td(47.55 KB)
📄 Mips64InstrInfo.td(58.62 KB)
📄 Mips64r6InstrInfo.td(15.93 KB)
📄 MipsAnalyzeImmediate.cpp(4.62 KB)
📄 MipsAnalyzeImmediate.h(2.24 KB)
📄 MipsAsmPrinter.cpp(43.89 KB)
📄 MipsAsmPrinter.h(6.04 KB)
📄 MipsBranchExpansion.cpp(29.72 KB)
📄 MipsCCState.cpp(6.71 KB)
📄 MipsCCState.h(6.14 KB)
📄 MipsCallLowering.cpp(23.62 KB)
📄 MipsCallLowering.h(3.35 KB)
📄 MipsCallingConv.td(17.55 KB)
📄 MipsCondMov.td(14.56 KB)
📄 MipsConstantIslandPass.cpp(62.17 KB)
📄 MipsDSPInstrFormats.td(7.39 KB)
📄 MipsDSPInstrInfo.td(68.68 KB)
📄 MipsDelaySlotFiller.cpp(32.55 KB)
📄 MipsEVAInstrFormats.td(2.51 KB)
📄 MipsEVAInstrInfo.td(8.52 KB)
📄 MipsExpandPseudo.cpp(30.1 KB)
📄 MipsFastISel.cpp(66.8 KB)
📄 MipsFrameLowering.cpp(5.75 KB)
📄 MipsFrameLowering.h(1.74 KB)
📄 MipsISelDAGToDAG.cpp(10.22 KB)
📄 MipsISelDAGToDAG.h(6.13 KB)
📄 MipsISelLowering.cpp(192.31 KB)
📄 MipsISelLowering.h(27.02 KB)
📄 MipsInstrFPU.td(44.82 KB)
📄 MipsInstrFormats.td(19.73 KB)
📄 MipsInstrInfo.cpp(28.1 KB)
📄 MipsInstrInfo.h(7.87 KB)
📄 MipsInstrInfo.td(138.02 KB)
📄 MipsInstructionSelector.cpp(34.44 KB)
📄 MipsLegalizerInfo.cpp(21.07 KB)
📄 MipsLegalizerInfo.h(1.19 KB)
📄 MipsMCInstLower.cpp(9.68 KB)
📄 MipsMCInstLower.h(1.77 KB)
📄 MipsMSAInstrFormats.td(9.18 KB)
📄 MipsMSAInstrInfo.td(182.92 KB)
📄 MipsMTInstrFormats.td(2.44 KB)
📄 MipsMTInstrInfo.td(7.59 KB)
📄 MipsMachineFunction.cpp(7.22 KB)
📄 MipsMachineFunction.h(4.37 KB)
📄 MipsModuleISelDAGToDAG.cpp(1.67 KB)
📄 MipsOptimizePICCall.cpp(9.78 KB)
📄 MipsOptionRecord.h(2.9 KB)
📄 MipsOs16.cpp(4.18 KB)
📄 MipsPfmCounters.td(706 B)
📄 MipsPreLegalizerCombiner.cpp(3.93 KB)
📄 MipsRegisterBankInfo.cpp(26.01 KB)
📄 MipsRegisterBankInfo.h(9.13 KB)
📄 MipsRegisterBanks.td(573 B)
📄 MipsRegisterInfo.cpp(10.41 KB)
📄 MipsRegisterInfo.h(2.82 KB)
📄 MipsRegisterInfo.td(23.18 KB)
📄 MipsSEFrameLowering.cpp(34.47 KB)
📄 MipsSEFrameLowering.h(1.88 KB)
📄 MipsSEISelDAGToDAG.cpp(49.41 KB)
📄 MipsSEISelDAGToDAG.h(5.92 KB)
📄 MipsSEISelLowering.cpp(140.76 KB)
📄 MipsSEISelLowering.h(6.25 KB)
📄 MipsSEInstrInfo.cpp(34.71 KB)
📄 MipsSEInstrInfo.h(5.34 KB)
📄 MipsSERegisterInfo.cpp(8.44 KB)
📄 MipsSERegisterInfo.h(1.2 KB)
📄 MipsSchedule.td(38.24 KB)
📄 MipsScheduleGeneric.td(71.71 KB)
📄 MipsScheduleP5600.td(27.85 KB)
📄 MipsSubtarget.cpp(10.72 KB)
📄 MipsSubtarget.h(13.43 KB)
📄 MipsTargetMachine.cpp(12.66 KB)
📄 MipsTargetMachine.h(3.08 KB)
📄 MipsTargetObjectFile.cpp(7.39 KB)
📄 MipsTargetObjectFile.h(2.02 KB)
📄 MipsTargetStreamer.h(14.58 KB)
📄 Relocation.txt(3.91 KB)
📁 TargetInfo

Editing: MipsOptionRecord.h

//===- MipsOptionRecord.h - Abstraction for storing information -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// MipsOptionRecord - Abstraction for storing arbitrary information in
// ELF files. Arbitrary information (e.g. register usage) can be stored in Mips
// specific ELF sections like .Mips.options. Specific records should subclass
// MipsOptionRecord and provide an implementation to EmitMipsOptionRecord which
// basically just dumps the information into an ELF section. More information
// about .Mips.option can be found in the SysV ABI and the 64-bit ELF Object
// specification.
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_TARGET_MIPS_MIPSOPTIONRECORD_H
#define LLVM_LIB_TARGET_MIPS_MIPSOPTIONRECORD_H

#include "MCTargetDesc/MipsMCTargetDesc.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCRegisterInfo.h"
#include <cstdint>

namespace llvm {

class MipsELFStreamer;

class MipsOptionRecord {
public:
  virtual ~MipsOptionRecord() = default;

virtual void EmitMipsOptionRecord() = 0;
};

class MipsRegInfoRecord : public MipsOptionRecord {
public:
  MipsRegInfoRecord(MipsELFStreamer *S, MCContext &Context)
      : Streamer(S), Context(Context) {
    ri_gprmask = 0;
    ri_cprmask[0] = ri_cprmask[1] = ri_cprmask[2] = ri_cprmask[3] = 0;
    ri_gp_value = 0;

const MCRegisterInfo *TRI = Context.getRegisterInfo();
    GPR32RegClass = &(TRI->getRegClass(Mips::GPR32RegClassID));
    GPR64RegClass = &(TRI->getRegClass(Mips::GPR64RegClassID));
    FGR32RegClass = &(TRI->getRegClass(Mips::FGR32RegClassID));
    FGR64RegClass = &(TRI->getRegClass(Mips::FGR64RegClassID));
    AFGR64RegClass = &(TRI->getRegClass(Mips::AFGR64RegClassID));
    MSA128BRegClass = &(TRI->getRegClass(Mips::MSA128BRegClassID));
    COP0RegClass = &(TRI->getRegClass(Mips::COP0RegClassID));
    COP2RegClass = &(TRI->getRegClass(Mips::COP2RegClassID));
    COP3RegClass = &(TRI->getRegClass(Mips::COP3RegClassID));
  }

~MipsRegInfoRecord() override = default;

void EmitMipsOptionRecord() override;
  void SetPhysRegUsed(unsigned Reg, const MCRegisterInfo *MCRegInfo);

private:
  MipsELFStreamer *Streamer;
  MCContext &Context;
  const MCRegisterClass *GPR32RegClass;
  const MCRegisterClass *GPR64RegClass;
  const MCRegisterClass *FGR32RegClass;
  const MCRegisterClass *FGR64RegClass;
  const MCRegisterClass *AFGR64RegClass;
  const MCRegisterClass *MSA128BRegClass;
  const MCRegisterClass *COP0RegClass;
  const MCRegisterClass *COP2RegClass;
  const MCRegisterClass *COP3RegClass;
  uint32_t ri_gprmask;
  uint32_t ri_cprmask[4];
  int64_t ri_gp_value;
};

} // end namespace llvm

#endif // LLVM_LIB_TARGET_MIPS_MIPSOPTIONRECORD_H

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Editing: MipsOptionRecord.h

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