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Current Path: /usr/src/contrib/llvm-project/llvm/lib/Target/NVPTX

usr / src / contrib / llvm-project / llvm / lib / Target / NVPTX /

📁 ..
📁 MCTargetDesc
📄 ManagedStringPool.h(1.41 KB)
📄 NVPTX.h(3.22 KB)
📄 NVPTX.td(4.99 KB)
📄 NVPTXAllocaHoisting.cpp(2.12 KB)
📄 NVPTXAllocaHoisting.h(755 B)
📄 NVPTXAsmPrinter.cpp(71.02 KB)
📄 NVPTXAsmPrinter.h(11.23 KB)
📄 NVPTXAssignValidGlobalNames.cpp(2.74 KB)
📄 NVPTXFrameLowering.cpp(3.41 KB)
📄 NVPTXFrameLowering.h(1.34 KB)
📄 NVPTXGenericToNVVM.cpp(11.59 KB)
📄 NVPTXISelDAGToDAG.cpp(134.03 KB)
📄 NVPTXISelDAGToDAG.h(3.54 KB)
📄 NVPTXISelLowering.cpp(198.59 KB)
📄 NVPTXISelLowering.h(15.65 KB)
📄 NVPTXImageOptimizer.cpp(5.64 KB)
📄 NVPTXInstrFormats.td(1.72 KB)
📄 NVPTXInstrInfo.cpp(7.88 KB)
📄 NVPTXInstrInfo.h(2.87 KB)
📄 NVPTXInstrInfo.td(133.35 KB)
📄 NVPTXIntrinsics.td(329.76 KB)
📄 NVPTXLowerAggrCopies.cpp(4.85 KB)
📄 NVPTXLowerAggrCopies.h(744 B)
📄 NVPTXLowerAlloca.cpp(4.27 KB)
📄 NVPTXLowerArgs.cpp(9.16 KB)
📄 NVPTXMCExpr.cpp(2.04 KB)
📄 NVPTXMCExpr.h(3.92 KB)
📄 NVPTXMachineFunctionInfo.h(1.71 KB)
📄 NVPTXPeephole.cpp(4.92 KB)
📄 NVPTXPrologEpilogPass.cpp(8.91 KB)
📄 NVPTXProxyRegErasure.cpp(3.81 KB)
📄 NVPTXRegisterInfo.cpp(4.41 KB)
📄 NVPTXRegisterInfo.h(2.04 KB)
📄 NVPTXRegisterInfo.td(3.12 KB)
📄 NVPTXReplaceImageHandles.cpp(6.27 KB)
📄 NVPTXSubtarget.cpp(2.15 KB)
📄 NVPTXSubtarget.h(3.02 KB)
📄 NVPTXTargetMachine.cpp(14.25 KB)
📄 NVPTXTargetMachine.h(3.33 KB)
📄 NVPTXTargetObjectFile.h(1.53 KB)
📄 NVPTXTargetTransformInfo.cpp(6.18 KB)
📄 NVPTXTargetTransformInfo.h(4.7 KB)
📄 NVPTXUtilities.cpp(9.37 KB)
📄 NVPTXUtilities.h(2.03 KB)
📄 NVVMIntrRange.cpp(4.88 KB)
📄 NVVMReflect.cpp(6.8 KB)
📁 TargetInfo
📄 cl_common_defines.h(3.94 KB)

Editing: NVPTXISelDAGToDAG.h

//===-- NVPTXISelDAGToDAG.h - A dag to dag inst selector for NVPTX --------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines an instruction selector for the NVPTX target.
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_TARGET_NVPTX_NVPTXISELDAGTODAG_H
#define LLVM_LIB_TARGET_NVPTX_NVPTXISELDAGTODAG_H

#include "NVPTX.h"
#include "NVPTXISelLowering.h"
#include "NVPTXRegisterInfo.h"
#include "NVPTXTargetMachine.h"
#include "MCTargetDesc/NVPTXBaseInfo.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/Support/Compiler.h"

namespace llvm {

class LLVM_LIBRARY_VISIBILITY NVPTXDAGToDAGISel : public SelectionDAGISel {
  const NVPTXTargetMachine &TM;

// If true, generate mul.wide from sext and mul
  bool doMulWide;

int getDivF32Level() const;
  bool usePrecSqrtF32() const;
  bool useF32FTZ() const;
  bool allowFMA() const;
  bool allowUnsafeFPMath() const;
  bool useShortPointers() const;

public:
  explicit NVPTXDAGToDAGISel(NVPTXTargetMachine &tm,
                             CodeGenOpt::Level   OptLevel);

// Pass Name
  StringRef getPassName() const override {
    return "NVPTX DAG->DAG Pattern Instruction Selection";
  }
  bool runOnMachineFunction(MachineFunction &MF) override;
  const NVPTXSubtarget *Subtarget = nullptr;

bool SelectInlineAsmMemoryOperand(const SDValue &Op,
                                    unsigned ConstraintID,
                                    std::vector<SDValue> &OutOps) override;
private:
// Include the pieces autogenerated from the target description.
#include "NVPTXGenDAGISel.inc"

void Select(SDNode *N) override;
  bool tryIntrinsicNoChain(SDNode *N);
  bool tryIntrinsicChain(SDNode *N);
  void SelectTexSurfHandle(SDNode *N);
  bool tryLoad(SDNode *N);
  bool tryLoadVector(SDNode *N);
  bool tryLDGLDU(SDNode *N);
  bool tryStore(SDNode *N);
  bool tryStoreVector(SDNode *N);
  bool tryLoadParam(SDNode *N);
  bool tryStoreRetval(SDNode *N);
  bool tryStoreParam(SDNode *N);
  void SelectAddrSpaceCast(SDNode *N);
  bool tryTextureIntrinsic(SDNode *N);
  bool trySurfaceIntrinsic(SDNode *N);
  bool tryBFE(SDNode *N);
  bool tryConstantFP16(SDNode *N);
  bool SelectSETP_F16X2(SDNode *N);
  bool tryEXTRACT_VECTOR_ELEMENT(SDNode *N);

inline SDValue getI32Imm(unsigned Imm, const SDLoc &DL) {
    return CurDAG->getTargetConstant(Imm, DL, MVT::i32);
  }

// Match direct address complex pattern.
  bool SelectDirectAddr(SDValue N, SDValue &Address);

bool SelectADDRri_imp(SDNode *OpNode, SDValue Addr, SDValue &Base,
                        SDValue &Offset, MVT mvt);
  bool SelectADDRri(SDNode *OpNode, SDValue Addr, SDValue &Base,
                    SDValue &Offset);
  bool SelectADDRri64(SDNode *OpNode, SDValue Addr, SDValue &Base,
                      SDValue &Offset);
  bool SelectADDRsi_imp(SDNode *OpNode, SDValue Addr, SDValue &Base,
                        SDValue &Offset, MVT mvt);
  bool SelectADDRsi(SDNode *OpNode, SDValue Addr, SDValue &Base,
                    SDValue &Offset);
  bool SelectADDRsi64(SDNode *OpNode, SDValue Addr, SDValue &Base,
                      SDValue &Offset);

bool ChkMemSDNodeAddressSpace(SDNode *N, unsigned int spN) const;

static unsigned GetConvertOpcode(MVT DestTy, MVT SrcTy, bool IsSigned);
};
} // end namespace llvm

#endif

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Editing: NVPTXISelDAGToDAG.h

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