File Manager

003 File Manager

Current Path: /usr/src/contrib/llvm-project/llvm/lib/Target/NVPTX

usr / src / contrib / llvm-project / llvm / lib / Target / NVPTX /

📁 ..
📁 MCTargetDesc
📄 ManagedStringPool.h(1.41 KB)
📄 NVPTX.h(3.22 KB)
📄 NVPTX.td(4.99 KB)
📄 NVPTXAllocaHoisting.cpp(2.12 KB)
📄 NVPTXAllocaHoisting.h(755 B)
📄 NVPTXAsmPrinter.cpp(71.02 KB)
📄 NVPTXAsmPrinter.h(11.23 KB)
📄 NVPTXAssignValidGlobalNames.cpp(2.74 KB)
📄 NVPTXFrameLowering.cpp(3.41 KB)
📄 NVPTXFrameLowering.h(1.34 KB)
📄 NVPTXGenericToNVVM.cpp(11.59 KB)
📄 NVPTXISelDAGToDAG.cpp(134.03 KB)
📄 NVPTXISelDAGToDAG.h(3.54 KB)
📄 NVPTXISelLowering.cpp(198.59 KB)
📄 NVPTXISelLowering.h(15.65 KB)
📄 NVPTXImageOptimizer.cpp(5.64 KB)
📄 NVPTXInstrFormats.td(1.72 KB)
📄 NVPTXInstrInfo.cpp(7.88 KB)
📄 NVPTXInstrInfo.h(2.87 KB)
📄 NVPTXInstrInfo.td(133.35 KB)
📄 NVPTXIntrinsics.td(329.76 KB)
📄 NVPTXLowerAggrCopies.cpp(4.85 KB)
📄 NVPTXLowerAggrCopies.h(744 B)
📄 NVPTXLowerAlloca.cpp(4.27 KB)
📄 NVPTXLowerArgs.cpp(9.16 KB)
📄 NVPTXMCExpr.cpp(2.04 KB)
📄 NVPTXMCExpr.h(3.92 KB)
📄 NVPTXMachineFunctionInfo.h(1.71 KB)
📄 NVPTXPeephole.cpp(4.92 KB)
📄 NVPTXPrologEpilogPass.cpp(8.91 KB)
📄 NVPTXProxyRegErasure.cpp(3.81 KB)
📄 NVPTXRegisterInfo.cpp(4.41 KB)
📄 NVPTXRegisterInfo.h(2.04 KB)
📄 NVPTXRegisterInfo.td(3.12 KB)
📄 NVPTXReplaceImageHandles.cpp(6.27 KB)
📄 NVPTXSubtarget.cpp(2.15 KB)
📄 NVPTXSubtarget.h(3.02 KB)
📄 NVPTXTargetMachine.cpp(14.25 KB)
📄 NVPTXTargetMachine.h(3.33 KB)
📄 NVPTXTargetObjectFile.h(1.53 KB)
📄 NVPTXTargetTransformInfo.cpp(6.18 KB)
📄 NVPTXTargetTransformInfo.h(4.7 KB)
📄 NVPTXUtilities.cpp(9.37 KB)
📄 NVPTXUtilities.h(2.03 KB)
📄 NVVMIntrRange.cpp(4.88 KB)
📄 NVVMReflect.cpp(6.8 KB)
📁 TargetInfo
📄 cl_common_defines.h(3.94 KB)

Editing: NVPTXInstrFormats.td

//===- NVPTXInstrFormats.td - NVPTX Instruction Formats-------*- tblgen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

//===----------------------------------------------------------------------===//
//  Describe NVPTX instructions format
//
//===----------------------------------------------------------------------===//

// Vector instruction type enum
class VecInstTypeEnum<bits<4> val> {
  bits<4> Value=val;
}
def VecNOP : VecInstTypeEnum<0>;

// Generic NVPTX Format

class NVPTXInst<dag outs, dag ins, string asmstr, list<dag> pattern>
  : Instruction {
  field bits<14> Inst;

let Namespace = "NVPTX";
  dag OutOperandList = outs;
  dag InOperandList = ins;
  let AsmString = asmstr;
  let Pattern = pattern;

// TSFlagFields
  bits<4> VecInstType = VecNOP.Value;
  bit IsSimpleMove = 0;
  bit IsLoad = 0;
  bit IsStore = 0;

bit IsTex = 0;
  bit IsSust = 0;
  bit IsSurfTexQuery = 0;
  bit IsTexModeUnified = 0;

// The following field is encoded as log2 of the vector size minus one,
  // with 0 meaning the operation is not a surface instruction.  For example,
  // if IsSuld == 2, then the instruction is a suld instruction with vector size
  // 2**(2-1) = 2.
  bits<2> IsSuld = 0;

let TSFlags{3-0}   = VecInstType;
  let TSFlags{4-4}   = IsSimpleMove;
  let TSFlags{5-5}   = IsLoad;
  let TSFlags{6-6}   = IsStore;
  let TSFlags{7}     = IsTex;
  let TSFlags{9-8}   = IsSuld;
  let TSFlags{10}    = IsSust;
  let TSFlags{11}    = IsSurfTexQuery;
  let TSFlags{12}    = IsTexModeUnified;
}

003 File Manager

Editing: NVPTXInstrFormats.td

Upload File

Create Folder