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MCTargetDesc
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ManagedStringPool.h
(1.41 KB)
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NVPTX.h
(3.22 KB)
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NVPTX.td
(4.99 KB)
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NVPTXAllocaHoisting.cpp
(2.12 KB)
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NVPTXAllocaHoisting.h
(755 B)
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NVPTXAsmPrinter.cpp
(71.02 KB)
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NVPTXAsmPrinter.h
(11.23 KB)
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NVPTXAssignValidGlobalNames.cpp
(2.74 KB)
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NVPTXFrameLowering.cpp
(3.41 KB)
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NVPTXFrameLowering.h
(1.34 KB)
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NVPTXGenericToNVVM.cpp
(11.59 KB)
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NVPTXISelDAGToDAG.cpp
(134.03 KB)
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NVPTXISelDAGToDAG.h
(3.54 KB)
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NVPTXISelLowering.cpp
(198.59 KB)
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NVPTXISelLowering.h
(15.65 KB)
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NVPTXImageOptimizer.cpp
(5.64 KB)
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NVPTXInstrFormats.td
(1.72 KB)
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NVPTXInstrInfo.cpp
(7.88 KB)
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NVPTXInstrInfo.h
(2.87 KB)
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NVPTXInstrInfo.td
(133.35 KB)
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NVPTXIntrinsics.td
(329.76 KB)
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NVPTXLowerAggrCopies.cpp
(4.85 KB)
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NVPTXLowerAggrCopies.h
(744 B)
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NVPTXLowerAlloca.cpp
(4.27 KB)
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NVPTXLowerArgs.cpp
(9.16 KB)
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NVPTXMCExpr.cpp
(2.04 KB)
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NVPTXMCExpr.h
(3.92 KB)
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NVPTXMachineFunctionInfo.h
(1.71 KB)
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NVPTXPeephole.cpp
(4.92 KB)
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NVPTXPrologEpilogPass.cpp
(8.91 KB)
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NVPTXProxyRegErasure.cpp
(3.81 KB)
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NVPTXRegisterInfo.cpp
(4.41 KB)
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NVPTXRegisterInfo.h
(2.04 KB)
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NVPTXRegisterInfo.td
(3.12 KB)
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NVPTXReplaceImageHandles.cpp
(6.27 KB)
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NVPTXSubtarget.cpp
(2.15 KB)
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NVPTXSubtarget.h
(3.02 KB)
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NVPTXTargetMachine.cpp
(14.25 KB)
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NVPTXTargetMachine.h
(3.33 KB)
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NVPTXTargetObjectFile.h
(1.53 KB)
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NVPTXTargetTransformInfo.cpp
(6.18 KB)
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NVPTXTargetTransformInfo.h
(4.7 KB)
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NVPTXUtilities.cpp
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NVPTXUtilities.h
(2.03 KB)
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NVVMIntrRange.cpp
(4.88 KB)
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NVVMReflect.cpp
(6.8 KB)
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TargetInfo
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cl_common_defines.h
(3.94 KB)
Editing: NVPTXInstrInfo.h
//===- NVPTXInstrInfo.h - NVPTX Instruction Information----------*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file contains the NVPTX implementation of the TargetInstrInfo class. // //===----------------------------------------------------------------------===// #ifndef LLVM_LIB_TARGET_NVPTX_NVPTXINSTRINFO_H #define LLVM_LIB_TARGET_NVPTX_NVPTXINSTRINFO_H #include "NVPTX.h" #include "NVPTXRegisterInfo.h" #include "llvm/CodeGen/TargetInstrInfo.h" #define GET_INSTRINFO_HEADER #include "NVPTXGenInstrInfo.inc" namespace llvm { class NVPTXInstrInfo : public NVPTXGenInstrInfo { const NVPTXRegisterInfo RegInfo; virtual void anchor(); public: explicit NVPTXInstrInfo(); const NVPTXRegisterInfo &getRegisterInfo() const { return RegInfo; } /* The following virtual functions are used in register allocation. * They are not implemented because the existing interface and the logic * at the caller side do not work for the elementized vector load and store. * * virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, * int &FrameIndex) const; * virtual unsigned isStoreToStackSlot(const MachineInstr *MI, * int &FrameIndex) const; * virtual void storeRegToStackSlot(MachineBasicBlock &MBB, * MachineBasicBlock::iterator MBBI, * unsigned SrcReg, bool isKill, int FrameIndex, * const TargetRegisterClass *RC) const; * virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, * MachineBasicBlock::iterator MBBI, * unsigned DestReg, int FrameIndex, * const TargetRegisterClass *RC) const; */ void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override; // Branch analysis. bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const override; unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved = nullptr) const override; unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded = nullptr) const override; }; } // namespace llvm #endif
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