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Current Path: /usr/src/contrib/llvm-project/llvm/lib/Target/NVPTX

usr / src / contrib / llvm-project / llvm / lib / Target / NVPTX /

📁 ..
📁 MCTargetDesc
📄 ManagedStringPool.h(1.41 KB)
📄 NVPTX.h(3.22 KB)
📄 NVPTX.td(4.99 KB)
📄 NVPTXAllocaHoisting.cpp(2.12 KB)
📄 NVPTXAllocaHoisting.h(755 B)
📄 NVPTXAsmPrinter.cpp(71.02 KB)
📄 NVPTXAsmPrinter.h(11.23 KB)
📄 NVPTXAssignValidGlobalNames.cpp(2.74 KB)
📄 NVPTXFrameLowering.cpp(3.41 KB)
📄 NVPTXFrameLowering.h(1.34 KB)
📄 NVPTXGenericToNVVM.cpp(11.59 KB)
📄 NVPTXISelDAGToDAG.cpp(134.03 KB)
📄 NVPTXISelDAGToDAG.h(3.54 KB)
📄 NVPTXISelLowering.cpp(198.59 KB)
📄 NVPTXISelLowering.h(15.65 KB)
📄 NVPTXImageOptimizer.cpp(5.64 KB)
📄 NVPTXInstrFormats.td(1.72 KB)
📄 NVPTXInstrInfo.cpp(7.88 KB)
📄 NVPTXInstrInfo.h(2.87 KB)
📄 NVPTXInstrInfo.td(133.35 KB)
📄 NVPTXIntrinsics.td(329.76 KB)
📄 NVPTXLowerAggrCopies.cpp(4.85 KB)
📄 NVPTXLowerAggrCopies.h(744 B)
📄 NVPTXLowerAlloca.cpp(4.27 KB)
📄 NVPTXLowerArgs.cpp(9.16 KB)
📄 NVPTXMCExpr.cpp(2.04 KB)
📄 NVPTXMCExpr.h(3.92 KB)
📄 NVPTXMachineFunctionInfo.h(1.71 KB)
📄 NVPTXPeephole.cpp(4.92 KB)
📄 NVPTXPrologEpilogPass.cpp(8.91 KB)
📄 NVPTXProxyRegErasure.cpp(3.81 KB)
📄 NVPTXRegisterInfo.cpp(4.41 KB)
📄 NVPTXRegisterInfo.h(2.04 KB)
📄 NVPTXRegisterInfo.td(3.12 KB)
📄 NVPTXReplaceImageHandles.cpp(6.27 KB)
📄 NVPTXSubtarget.cpp(2.15 KB)
📄 NVPTXSubtarget.h(3.02 KB)
📄 NVPTXTargetMachine.cpp(14.25 KB)
📄 NVPTXTargetMachine.h(3.33 KB)
📄 NVPTXTargetObjectFile.h(1.53 KB)
📄 NVPTXTargetTransformInfo.cpp(6.18 KB)
📄 NVPTXTargetTransformInfo.h(4.7 KB)
📄 NVPTXUtilities.cpp(9.37 KB)
📄 NVPTXUtilities.h(2.03 KB)
📄 NVVMIntrRange.cpp(4.88 KB)
📄 NVVMReflect.cpp(6.8 KB)
📁 TargetInfo
📄 cl_common_defines.h(3.94 KB)

Editing: NVPTXProxyRegErasure.cpp

//===- NVPTXProxyRegErasure.cpp - NVPTX Proxy Register Instruction Erasure -==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The pass is needed to remove ProxyReg instructions and restore related
// registers. The instructions were needed at instruction selection stage to
// make sure that callseq_end nodes won't be removed as "dead nodes". This can
// happen when we expand instructions into libcalls and the call site doesn't
// care about the libcall chain. Call site cares about data flow only, and the
// latest data flow node happens to be before callseq_end. Therefore the node
// becomes dangling and "dead". The ProxyReg acts like an additional data flow
// node *after* the callseq_end in the chain and ensures that everything will be
// preserved.
//
//===----------------------------------------------------------------------===//

#include "NVPTX.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"

using namespace llvm;

namespace llvm {
void initializeNVPTXProxyRegErasurePass(PassRegistry &);
}

namespace {

struct NVPTXProxyRegErasure : public MachineFunctionPass {
public:
  static char ID;
  NVPTXProxyRegErasure() : MachineFunctionPass(ID) {
    initializeNVPTXProxyRegErasurePass(*PassRegistry::getPassRegistry());
  }

bool runOnMachineFunction(MachineFunction &MF) override;

StringRef getPassName() const override {
    return "NVPTX Proxy Register Instruction Erasure";
  }

void getAnalysisUsage(AnalysisUsage &AU) const override {
    MachineFunctionPass::getAnalysisUsage(AU);
  }

private:
  void replaceMachineInstructionUsage(MachineFunction &MF, MachineInstr &MI);

void replaceRegisterUsage(MachineInstr &Instr, MachineOperand &From,
                            MachineOperand &To);
};

} // namespace

char NVPTXProxyRegErasure::ID = 0;

INITIALIZE_PASS(NVPTXProxyRegErasure, "nvptx-proxyreg-erasure", "NVPTX ProxyReg Erasure", false, false)

bool NVPTXProxyRegErasure::runOnMachineFunction(MachineFunction &MF) {
  SmallVector<MachineInstr *, 16> RemoveList;

for (auto &BB : MF) {
    for (auto &MI : BB) {
      switch (MI.getOpcode()) {
      case NVPTX::ProxyRegI1:
      case NVPTX::ProxyRegI16:
      case NVPTX::ProxyRegI32:
      case NVPTX::ProxyRegI64:
      case NVPTX::ProxyRegF16:
      case NVPTX::ProxyRegF16x2:
      case NVPTX::ProxyRegF32:
      case NVPTX::ProxyRegF64:
        replaceMachineInstructionUsage(MF, MI);
        RemoveList.push_back(&MI);
        break;
      }
    }
  }

for (auto *MI : RemoveList) {
    MI->eraseFromParent();
  }

return !RemoveList.empty();
}

void NVPTXProxyRegErasure::replaceMachineInstructionUsage(MachineFunction &MF,
                                                          MachineInstr &MI) {
  auto &InOp = *MI.uses().begin();
  auto &OutOp = *MI.defs().begin();

assert(InOp.isReg() && "ProxyReg input operand should be a register.");
  assert(OutOp.isReg() && "ProxyReg output operand should be a register.");

for (auto &BB : MF) {
    for (auto &I : BB) {
      replaceRegisterUsage(I, OutOp, InOp);
    }
  }
}

void NVPTXProxyRegErasure::replaceRegisterUsage(MachineInstr &Instr,
                                                MachineOperand &From,
                                                MachineOperand &To) {
  for (auto &Op : Instr.uses()) {
    if (Op.isReg() && Op.getReg() == From.getReg()) {
      Op.setReg(To.getReg());
    }
  }
}

MachineFunctionPass *llvm::createNVPTXProxyRegErasurePass() {
  return new NVPTXProxyRegErasure();
}

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Editing: NVPTXProxyRegErasure.cpp

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