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📄 AArch64.cpp(29.01 KB)
📄 AArch64.h(6.99 KB)
📄 AMDGPU.cpp(15.27 KB)
📄 AMDGPU.h(11.06 KB)
📄 ARC.cpp(857 B)
📄 ARC.h(2.44 KB)
📄 ARM.cpp(42.48 KB)
📄 ARM.h(8.67 KB)
📄 AVR.cpp(12.02 KB)
📄 AVR.h(5.74 KB)
📄 BPF.cpp(1.75 KB)
📄 BPF.h(3.11 KB)
📄 Hexagon.cpp(7.02 KB)
📄 Hexagon.h(4.49 KB)
📄 Lanai.cpp(2.31 KB)
📄 Lanai.h(3.09 KB)
📄 Le64.cpp(1.38 KB)
📄 Le64.h(1.99 KB)
📄 MSP430.cpp(1.14 KB)
📄 MSP430.h(2.99 KB)
📄 Mips.cpp(9.62 KB)
📄 Mips.h(13.84 KB)
📄 NVPTX.cpp(8.97 KB)
📄 NVPTX.h(5.28 KB)
📄 OSTargets.cpp(7.11 KB)
📄 OSTargets.h(29.36 KB)
📄 PNaCl.cpp(1001 B)
📄 PNaCl.h(2.78 KB)
📄 PPC.cpp(21.1 KB)
📄 PPC.h(17.89 KB)
📄 RISCV.cpp(6.88 KB)
📄 RISCV.h(4.14 KB)
📄 SPIR.cpp(1.2 KB)
📄 SPIR.h(4.54 KB)
📄 Sparc.cpp(9.86 KB)
📄 Sparc.h(7.06 KB)
📄 SystemZ.cpp(5.16 KB)
📄 SystemZ.h(4.88 KB)
📄 TCE.cpp(1.17 KB)
📄 TCE.h(3.99 KB)
📄 VE.cpp(1.43 KB)
📄 VE.h(5.14 KB)
📄 WebAssembly.cpp(8.19 KB)
📄 WebAssembly.h(5.6 KB)
📄 X86.cpp(48.61 KB)
📄 X86.h(27.36 KB)
📄 XCore.cpp(1.42 KB)
📄 XCore.h(2.61 KB)

Editing: PNaCl.h

//===--- PNaCl.h - Declare PNaCl target feature support ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares PNaCl TargetInfo objects.
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H
#define LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H

#include "Mips.h"
#include "clang/Basic/TargetInfo.h"
#include "clang/Basic/TargetOptions.h"
#include "llvm/ADT/Triple.h"
#include "llvm/Support/Compiler.h"

namespace clang {
namespace targets {

class LLVM_LIBRARY_VISIBILITY PNaClTargetInfo : public TargetInfo {
public:
  PNaClTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
      : TargetInfo(Triple) {
    this->LongAlign = 32;
    this->LongWidth = 32;
    this->PointerAlign = 32;
    this->PointerWidth = 32;
    this->IntMaxType = TargetInfo::SignedLongLong;
    this->Int64Type = TargetInfo::SignedLongLong;
    this->DoubleAlign = 64;
    this->LongDoubleWidth = 64;
    this->LongDoubleAlign = 64;
    this->SizeType = TargetInfo::UnsignedInt;
    this->PtrDiffType = TargetInfo::SignedInt;
    this->IntPtrType = TargetInfo::SignedInt;
    this->RegParmMax = 0; // Disallow regparm
  }

void getArchDefines(const LangOptions &Opts, MacroBuilder &Builder) const;

void getTargetDefines(const LangOptions &Opts,
                        MacroBuilder &Builder) const override {
    getArchDefines(Opts, Builder);
  }

bool hasFeature(StringRef Feature) const override {
    return Feature == "pnacl";
  }

ArrayRef<Builtin::Info> getTargetBuiltins() const override { return None; }

BuiltinVaListKind getBuiltinVaListKind() const override {
    return TargetInfo::PNaClABIBuiltinVaList;
  }

ArrayRef<const char *> getGCCRegNames() const override;

ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;

bool validateAsmConstraint(const char *&Name,
                             TargetInfo::ConstraintInfo &Info) const override {
    return false;
  }

const char *getClobbers() const override { return ""; }

bool hasExtIntType() const override { return true; }
};

// We attempt to use PNaCl (le32) frontend and Mips32EL backend.
class LLVM_LIBRARY_VISIBILITY NaClMips32TargetInfo : public MipsTargetInfo {
public:
  NaClMips32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
      : MipsTargetInfo(Triple, Opts) {}

BuiltinVaListKind getBuiltinVaListKind() const override {
    return TargetInfo::PNaClABIBuiltinVaList;
  }
};
} // namespace targets
} // namespace clang

#endif // LLVM_CLANG_LIB_BASIC_TARGETS_PNACL_H

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Editing: PNaCl.h

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