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usr / src / contrib / llvm-project / llvm / lib / Target / PowerPC /

📁 ..
📁 AsmParser
📁 Disassembler
📁 MCTargetDesc
📄 P9InstrResources.td(37.36 KB)
📄 PPC.h(4.69 KB)
📄 PPC.td(32.37 KB)
📄 PPCAsmPrinter.cpp(70.77 KB)
📄 PPCBoolRetToInt.cpp(9.97 KB)
📄 PPCBranchCoalescing.cpp(30.16 KB)
📄 PPCBranchSelector.cpp(15.97 KB)
📄 PPCCCState.cpp(1.08 KB)
📄 PPCCCState.h(1.19 KB)
📄 PPCCTRLoops.cpp(6.68 KB)
📄 PPCCallingConv.cpp(6.19 KB)
📄 PPCCallingConv.h(1.97 KB)
📄 PPCCallingConv.td(16.32 KB)
📄 PPCEarlyReturn.cpp(7.14 KB)
📄 PPCExpandISEL.cpp(17.93 KB)
📄 PPCFastISel.cpp(85.51 KB)
📄 PPCFrameLowering.cpp(98.6 KB)
📄 PPCFrameLowering.h(7.46 KB)
📄 PPCHazardRecognizers.cpp(14.02 KB)
📄 PPCHazardRecognizers.h(3.83 KB)
📄 PPCISelDAGToDAG.cpp(256.88 KB)
📄 PPCISelLowering.cpp(669.73 KB)
📄 PPCISelLowering.h(55.9 KB)
📄 PPCInstr64Bit.td(75.68 KB)
📄 PPCInstrAltivec.td(77.68 KB)
📄 PPCInstrBuilder.h(1.5 KB)
📄 PPCInstrFormats.td(57.38 KB)
📄 PPCInstrHTM.td(5.48 KB)
📄 PPCInstrInfo.cpp(171.06 KB)
📄 PPCInstrInfo.h(29.06 KB)
📄 PPCInstrInfo.td(233.39 KB)
📄 PPCInstrPrefix.td(41.72 KB)
📄 PPCInstrQPX.td(57.56 KB)
📄 PPCInstrSPE.td(49.71 KB)
📄 PPCInstrVSX.td(223.48 KB)
📄 PPCLoopInstrFormPrep.cpp(33.45 KB)
📄 PPCLowerMASSVEntries.cpp(6.42 KB)
📄 PPCMCInstLower.cpp(6.62 KB)
📄 PPCMIPeephole.cpp(63.48 KB)
📄 PPCMachineFunctionInfo.cpp(2.59 KB)
📄 PPCMachineFunctionInfo.h(9.15 KB)
📄 PPCMachineScheduler.cpp(4.03 KB)
📄 PPCMachineScheduler.h(1.81 KB)
📄 PPCMacroFusion.cpp(6.68 KB)
📄 PPCMacroFusion.def(1.8 KB)
📄 PPCMacroFusion.h(886 B)
📄 PPCPerfectShuffle.h(397.57 KB)
📄 PPCPfmCounters.td(705 B)
📄 PPCPreEmitPeephole.cpp(13.36 KB)
📄 PPCQPXLoadSplat.cpp(5.31 KB)
📄 PPCReduceCRLogicals.cpp(28.66 KB)
📄 PPCRegisterInfo.cpp(51.93 KB)
📄 PPCRegisterInfo.h(6.61 KB)
📄 PPCRegisterInfo.td(14.24 KB)
📄 PPCSchedule.td(5.21 KB)
📄 PPCSchedule440.td(34.57 KB)
📄 PPCScheduleA2.td(7.85 KB)
📄 PPCScheduleE500.td(16.59 KB)
📄 PPCScheduleE500mc.td(20.89 KB)
📄 PPCScheduleE5500.td(23.62 KB)
📄 PPCScheduleG3.td(4.49 KB)
📄 PPCScheduleG4.td(5.42 KB)
📄 PPCScheduleG4Plus.td(6.45 KB)
📄 PPCScheduleG5.td(7.1 KB)
📄 PPCScheduleP7.td(22.26 KB)
📄 PPCScheduleP8.td(23.96 KB)
📄 PPCScheduleP9.td(12.27 KB)
📄 PPCSubtarget.cpp(7.58 KB)
📄 PPCSubtarget.h(13.21 KB)
📄 PPCTLSDynamicCall.cpp(6.53 KB)
📄 PPCTOCRegDeps.cpp(5.3 KB)
📄 PPCTargetMachine.cpp(18.94 KB)
📄 PPCTargetMachine.h(2.2 KB)
📄 PPCTargetObjectFile.cpp(2.45 KB)
📄 PPCTargetObjectFile.h(1.19 KB)
📄 PPCTargetStreamer.h(1.02 KB)
📄 PPCTargetTransformInfo.cpp(38.72 KB)
📄 PPCTargetTransformInfo.h(5.6 KB)
📄 PPCVSXCopy.cpp(5.68 KB)
📄 PPCVSXFMAMutate.cpp(15.12 KB)
📄 PPCVSXSwapRemoval.cpp(36.78 KB)
📄 README_P9.txt(22.25 KB)
📁 TargetInfo

Editing: PPCEarlyReturn.cpp

//===------------- PPCEarlyReturn.cpp - Form Early Returns ----------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// A pass that form early (predicated) returns. If-conversion handles some of
// this, but this pass picks up some remaining cases.
//
//===----------------------------------------------------------------------===//

#include "MCTargetDesc/PPCPredicates.h"
#include "PPC.h"
#include "PPCInstrBuilder.h"
#include "PPCInstrInfo.h"
#include "PPCMachineFunctionInfo.h"
#include "PPCTargetMachine.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"

using namespace llvm;

#define DEBUG_TYPE "ppc-early-ret"
STATISTIC(NumBCLR, "Number of early conditional returns");
STATISTIC(NumBLR,  "Number of early returns");

namespace {
  // PPCEarlyReturn pass - For simple functions without epilogue code, move
  // returns up, and create conditional returns, to avoid unnecessary
  // branch-to-blr sequences.
  struct PPCEarlyReturn : public MachineFunctionPass {
    static char ID;
    PPCEarlyReturn() : MachineFunctionPass(ID) {
      initializePPCEarlyReturnPass(*PassRegistry::getPassRegistry());
    }

const TargetInstrInfo *TII;

protected:
    bool processBlock(MachineBasicBlock &ReturnMBB) {
      bool Changed = false;

MachineBasicBlock::iterator I = ReturnMBB.begin();
      I = ReturnMBB.SkipPHIsLabelsAndDebug(I);

// The block must be essentially empty except for the blr.
      if (I == ReturnMBB.end() ||
          (I->getOpcode() != PPC::BLR && I->getOpcode() != PPC::BLR8) ||
          I != ReturnMBB.getLastNonDebugInstr())
        return Changed;

SmallVector<MachineBasicBlock*, 8> PredToRemove;
      for (MachineBasicBlock::pred_iterator PI = ReturnMBB.pred_begin(),
           PIE = ReturnMBB.pred_end(); PI != PIE; ++PI) {
        bool OtherReference = false, BlockChanged = false;

if ((*PI)->empty())
          continue;

for (MachineBasicBlock::iterator J = (*PI)->getLastNonDebugInstr();;) {
          if (J == (*PI)->end())
            break;

if (J->getOpcode() == PPC::B) {
            if (J->getOperand(0).getMBB() == &ReturnMBB) {
              // This is an unconditional branch to the return. Replace the
              // branch with a blr.
              BuildMI(**PI, J, J->getDebugLoc(), TII->get(I->getOpcode()))
                  .copyImplicitOps(*I);
              MachineBasicBlock::iterator K = J--;
              K->eraseFromParent();
              BlockChanged = true;
              ++NumBLR;
              continue;
            }
          } else if (J->getOpcode() == PPC::BCC) {
            if (J->getOperand(2).getMBB() == &ReturnMBB) {
              // This is a conditional branch to the return. Replace the branch
              // with a bclr.
              BuildMI(**PI, J, J->getDebugLoc(), TII->get(PPC::BCCLR))
                  .add(J->getOperand(0))
                  .add(J->getOperand(1))
                  .copyImplicitOps(*I);
              MachineBasicBlock::iterator K = J--;
              K->eraseFromParent();
              BlockChanged = true;
              ++NumBCLR;
              continue;
            }
          } else if (J->getOpcode() == PPC::BC || J->getOpcode() == PPC::BCn) {
            if (J->getOperand(1).getMBB() == &ReturnMBB) {
              // This is a conditional branch to the return. Replace the branch
              // with a bclr.
              BuildMI(
                  **PI, J, J->getDebugLoc(),
                  TII->get(J->getOpcode() == PPC::BC ? PPC::BCLR : PPC::BCLRn))
                  .add(J->getOperand(0))
                  .copyImplicitOps(*I);
              MachineBasicBlock::iterator K = J--;
              K->eraseFromParent();
              BlockChanged = true;
              ++NumBCLR;
              continue;
            }
          } else if (J->isBranch()) {
            if (J->isIndirectBranch()) {
              if (ReturnMBB.hasAddressTaken())
                OtherReference = true;
            } else
              for (unsigned i = 0; i < J->getNumOperands(); ++i)
                if (J->getOperand(i).isMBB() &&
                    J->getOperand(i).getMBB() == &ReturnMBB)
                  OtherReference = true;
          } else if (!J->isTerminator() && !J->isDebugInstr())
            break;

if (J == (*PI)->begin())
            break;

--J;
        }

if ((*PI)->canFallThrough() && (*PI)->isLayoutSuccessor(&ReturnMBB))
          OtherReference = true;

// Predecessors are stored in a vector and can't be removed here.
        if (!OtherReference && BlockChanged) {
          PredToRemove.push_back(*PI);
        }

if (BlockChanged)
          Changed = true;
      }

for (unsigned i = 0, ie = PredToRemove.size(); i != ie; ++i)
        PredToRemove[i]->removeSuccessor(&ReturnMBB, true);

if (Changed && !ReturnMBB.hasAddressTaken()) {
        // We now might be able to merge this blr-only block into its
        // by-layout predecessor.
        if (ReturnMBB.pred_size() == 1) {
          MachineBasicBlock &PrevMBB = **ReturnMBB.pred_begin();
          if (PrevMBB.isLayoutSuccessor(&ReturnMBB) && PrevMBB.canFallThrough()) {
            // Move the blr into the preceding block.
            PrevMBB.splice(PrevMBB.end(), &ReturnMBB, I);
            PrevMBB.removeSuccessor(&ReturnMBB, true);
          }
        }

if (ReturnMBB.pred_empty())
          ReturnMBB.eraseFromParent();
      }

return Changed;
    }

public:
    bool runOnMachineFunction(MachineFunction &MF) override {
      if (skipFunction(MF.getFunction()))
        return false;

TII = MF.getSubtarget().getInstrInfo();

bool Changed = false;

// If the function does not have at least two blocks, then there is
      // nothing to do.
      if (MF.size() < 2)
        return Changed;
      
      // We can't use a range-based for loop due to clobbering the iterator.
      for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E;) {
        MachineBasicBlock &B = *I++;
        Changed |= processBlock(B);
      }

return Changed;
    }

MachineFunctionProperties getRequiredProperties() const override {
      return MachineFunctionProperties().set(
          MachineFunctionProperties::Property::NoVRegs);
    }

void getAnalysisUsage(AnalysisUsage &AU) const override {
      MachineFunctionPass::getAnalysisUsage(AU);
    }
  };
}

INITIALIZE_PASS(PPCEarlyReturn, DEBUG_TYPE,
                "PowerPC Early-Return Creation", false, false)

char PPCEarlyReturn::ID = 0;
FunctionPass*
llvm::createPPCEarlyReturnPass() { return new PPCEarlyReturn(); }

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Editing: PPCEarlyReturn.cpp

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