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AsmParser
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Disassembler
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MCTargetDesc
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P9InstrResources.td
(37.36 KB)
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PPC.h
(4.69 KB)
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PPC.td
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PPCAsmPrinter.cpp
(70.77 KB)
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PPCBoolRetToInt.cpp
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PPCBranchCoalescing.cpp
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PPCBranchSelector.cpp
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PPCCCState.cpp
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PPCCCState.h
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PPCCTRLoops.cpp
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PPCCallingConv.cpp
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PPCCallingConv.h
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PPCCallingConv.td
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PPCEarlyReturn.cpp
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PPCExpandISEL.cpp
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PPCFastISel.cpp
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PPCFrameLowering.cpp
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PPCFrameLowering.h
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PPCHazardRecognizers.cpp
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PPCHazardRecognizers.h
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PPCISelDAGToDAG.cpp
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PPCISelLowering.cpp
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PPCISelLowering.h
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PPCInstr64Bit.td
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PPCInstrAltivec.td
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PPCInstrBuilder.h
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PPCInstrFormats.td
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PPCInstrHTM.td
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PPCInstrInfo.cpp
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PPCInstrInfo.h
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PPCInstrInfo.td
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PPCInstrPrefix.td
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PPCInstrQPX.td
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PPCInstrSPE.td
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PPCInstrVSX.td
(223.48 KB)
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PPCLoopInstrFormPrep.cpp
(33.45 KB)
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PPCLowerMASSVEntries.cpp
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PPCMCInstLower.cpp
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PPCMIPeephole.cpp
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PPCMachineFunctionInfo.cpp
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PPCMachineFunctionInfo.h
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PPCMachineScheduler.cpp
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PPCMachineScheduler.h
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PPCMacroFusion.cpp
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PPCMacroFusion.def
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PPCMacroFusion.h
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PPCPerfectShuffle.h
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PPCPfmCounters.td
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PPCPreEmitPeephole.cpp
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PPCQPXLoadSplat.cpp
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PPCReduceCRLogicals.cpp
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PPCRegisterInfo.cpp
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PPCRegisterInfo.h
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PPCRegisterInfo.td
(14.24 KB)
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PPCSchedule.td
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PPCSchedule440.td
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PPCScheduleA2.td
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PPCScheduleE500.td
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PPCScheduleE500mc.td
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PPCScheduleE5500.td
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PPCScheduleG3.td
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PPCScheduleG4.td
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PPCScheduleG4Plus.td
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PPCScheduleG5.td
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PPCScheduleP7.td
(22.26 KB)
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PPCScheduleP8.td
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PPCScheduleP9.td
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PPCSubtarget.cpp
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PPCSubtarget.h
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PPCTLSDynamicCall.cpp
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PPCTOCRegDeps.cpp
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PPCTargetMachine.cpp
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PPCTargetMachine.h
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PPCTargetObjectFile.cpp
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PPCTargetObjectFile.h
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PPCTargetStreamer.h
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PPCTargetTransformInfo.cpp
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PPCTargetTransformInfo.h
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PPCVSXCopy.cpp
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PPCVSXFMAMutate.cpp
(15.12 KB)
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PPCVSXSwapRemoval.cpp
(36.78 KB)
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README_P9.txt
(22.25 KB)
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TargetInfo
Editing: PPCMacroFusion.def
//=== ---- PPCMacroFusion.def - PowerPC MacroFuson Candidates -v-*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https)//llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier) Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file contains descriptions of the macro-fusion pair for PowerPC. // //===----------------------------------------------------------------------===// // NOTE: NO INCLUDE GUARD DESIRED! #ifndef FUSION_FEATURE // Each FUSION_FEATURE is assigned with one TYPE, and can be enabled/disabled // by HAS_FEATURE. The instructions pair is fusable only when the opcode // of the first instruction is in OPSET1, and the second instruction opcode is // in OPSET2. And if DEP_OP_IDX >=0, we will check the result of first OP is // the operand of the second op with DEP_OP_IDX as its operand index. We assume // that the result of the first op is its operand zero. #define FUSION_FEATURE(TYPE, HAS_FEATURE, DEP_OP_IDX, OPSET1, OPSET2) #endif #ifndef FUSION_OP_SET #define FUSION_OP_SET(...) __VA_ARGS__ #endif // Power8 User Manual Section 10.1.12, Instruction Fusion // {addi} followed by one of these {lxvd2x, lxvw4x, lxvdsx, lvebx, lvehx, // lvewx, lvx, lxsdx} FUSION_FEATURE(AddiLoad, hasAddiLoadFusion, 2, \ FUSION_OP_SET(ADDI, ADDI8, ADDItocL), \ FUSION_OP_SET(LXVD2X, LXVW4X, LXVDSX, LVEBX, LVEHX, LVEWX, \ LVX, LXSDX)) // {addis) followed by one of these {ld, lbz, lhz, lwz} FUSION_FEATURE(AddisLoad, hasAddisLoadFusion, 2, \ FUSION_OP_SET(ADDIS, ADDIS8, ADDIStocHA8), \ FUSION_OP_SET(LD, LBZ, LBZ8, LHZ, LHZ8, LWZ, LWZ8)) #undef FUSION_FEATURE #undef FUSION_OP_SET
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