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AsmParser
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Disassembler
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MCTargetDesc
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P9InstrResources.td
(37.36 KB)
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PPC.h
(4.69 KB)
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PPC.td
(32.37 KB)
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PPCAsmPrinter.cpp
(70.77 KB)
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PPCBoolRetToInt.cpp
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PPCBranchCoalescing.cpp
(30.16 KB)
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PPCBranchSelector.cpp
(15.97 KB)
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PPCCCState.cpp
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PPCCCState.h
(1.19 KB)
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PPCCTRLoops.cpp
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PPCCallingConv.cpp
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PPCCallingConv.h
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PPCCallingConv.td
(16.32 KB)
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PPCEarlyReturn.cpp
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PPCExpandISEL.cpp
(17.93 KB)
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PPCFastISel.cpp
(85.51 KB)
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PPCFrameLowering.cpp
(98.6 KB)
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PPCFrameLowering.h
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PPCHazardRecognizers.cpp
(14.02 KB)
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PPCHazardRecognizers.h
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PPCISelDAGToDAG.cpp
(256.88 KB)
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PPCISelLowering.cpp
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PPCISelLowering.h
(55.9 KB)
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PPCInstr64Bit.td
(75.68 KB)
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PPCInstrAltivec.td
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PPCInstrBuilder.h
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PPCInstrFormats.td
(57.38 KB)
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PPCInstrHTM.td
(5.48 KB)
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PPCInstrInfo.cpp
(171.06 KB)
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PPCInstrInfo.h
(29.06 KB)
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PPCInstrInfo.td
(233.39 KB)
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PPCInstrPrefix.td
(41.72 KB)
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PPCInstrQPX.td
(57.56 KB)
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PPCInstrSPE.td
(49.71 KB)
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PPCInstrVSX.td
(223.48 KB)
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PPCLoopInstrFormPrep.cpp
(33.45 KB)
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PPCLowerMASSVEntries.cpp
(6.42 KB)
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PPCMCInstLower.cpp
(6.62 KB)
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PPCMIPeephole.cpp
(63.48 KB)
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PPCMachineFunctionInfo.cpp
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PPCMachineFunctionInfo.h
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PPCMachineScheduler.cpp
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PPCMachineScheduler.h
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PPCMacroFusion.cpp
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PPCMacroFusion.def
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PPCMacroFusion.h
(886 B)
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PPCPerfectShuffle.h
(397.57 KB)
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PPCPfmCounters.td
(705 B)
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PPCPreEmitPeephole.cpp
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PPCQPXLoadSplat.cpp
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PPCReduceCRLogicals.cpp
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PPCRegisterInfo.cpp
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PPCRegisterInfo.h
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PPCRegisterInfo.td
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PPCSchedule.td
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PPCSchedule440.td
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PPCScheduleA2.td
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PPCScheduleE500.td
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PPCScheduleE500mc.td
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PPCScheduleE5500.td
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PPCScheduleG3.td
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PPCScheduleG4.td
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PPCScheduleG4Plus.td
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PPCScheduleG5.td
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PPCScheduleP7.td
(22.26 KB)
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PPCScheduleP8.td
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PPCScheduleP9.td
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PPCSubtarget.cpp
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PPCSubtarget.h
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PPCTLSDynamicCall.cpp
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PPCTOCRegDeps.cpp
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PPCTargetMachine.cpp
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PPCTargetMachine.h
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PPCTargetObjectFile.cpp
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PPCTargetObjectFile.h
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PPCTargetStreamer.h
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PPCTargetTransformInfo.cpp
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PPCTargetTransformInfo.h
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PPCVSXCopy.cpp
(5.68 KB)
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PPCVSXFMAMutate.cpp
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PPCVSXSwapRemoval.cpp
(36.78 KB)
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README_P9.txt
(22.25 KB)
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TargetInfo
Editing: PPCVSXCopy.cpp
//===-------------- PPCVSXCopy.cpp - VSX Copy Legalization ----------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // A pass which deals with the complexity of generating legal VSX register // copies to/from register classes which partially overlap with the VSX // register file. // //===----------------------------------------------------------------------===// #include "MCTargetDesc/PPCPredicates.h" #include "PPC.h" #include "PPCHazardRecognizers.h" #include "PPCInstrBuilder.h" #include "PPCInstrInfo.h" #include "PPCMachineFunctionInfo.h" #include "PPCTargetMachine.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/Statistic.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineMemOperand.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/MC/MCAsmInfo.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Support/raw_ostream.h" using namespace llvm; #define DEBUG_TYPE "ppc-vsx-copy" namespace { // PPCVSXCopy pass - For copies between VSX registers and non-VSX registers // (Altivec and scalar floating-point registers), we need to transform the // copies into subregister copies with other restrictions. struct PPCVSXCopy : public MachineFunctionPass { static char ID; PPCVSXCopy() : MachineFunctionPass(ID) { initializePPCVSXCopyPass(*PassRegistry::getPassRegistry()); } const TargetInstrInfo *TII; bool IsRegInClass(unsigned Reg, const TargetRegisterClass *RC, MachineRegisterInfo &MRI) { if (Register::isVirtualRegister(Reg)) { return RC->hasSubClassEq(MRI.getRegClass(Reg)); } else if (RC->contains(Reg)) { return true; } return false; } bool IsVSReg(unsigned Reg, MachineRegisterInfo &MRI) { return IsRegInClass(Reg, &PPC::VSRCRegClass, MRI); } bool IsVRReg(unsigned Reg, MachineRegisterInfo &MRI) { return IsRegInClass(Reg, &PPC::VRRCRegClass, MRI); } bool IsF8Reg(unsigned Reg, MachineRegisterInfo &MRI) { return IsRegInClass(Reg, &PPC::F8RCRegClass, MRI); } bool IsVSFReg(unsigned Reg, MachineRegisterInfo &MRI) { return IsRegInClass(Reg, &PPC::VSFRCRegClass, MRI); } bool IsVSSReg(unsigned Reg, MachineRegisterInfo &MRI) { return IsRegInClass(Reg, &PPC::VSSRCRegClass, MRI); } protected: bool processBlock(MachineBasicBlock &MBB) { bool Changed = false; MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); for (MachineInstr &MI : MBB) { if (!MI.isFullCopy()) continue; MachineOperand &DstMO = MI.getOperand(0); MachineOperand &SrcMO = MI.getOperand(1); if ( IsVSReg(DstMO.getReg(), MRI) && !IsVSReg(SrcMO.getReg(), MRI)) { // This is a copy *to* a VSX register from a non-VSX register. Changed = true; const TargetRegisterClass *SrcRC = &PPC::VSLRCRegClass; assert((IsF8Reg(SrcMO.getReg(), MRI) || IsVSSReg(SrcMO.getReg(), MRI) || IsVSFReg(SrcMO.getReg(), MRI)) && "Unknown source for a VSX copy"); Register NewVReg = MRI.createVirtualRegister(SrcRC); BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(TargetOpcode::SUBREG_TO_REG), NewVReg) .addImm(1) // add 1, not 0, because there is no implicit clearing // of the high bits. .add(SrcMO) .addImm(PPC::sub_64); // The source of the original copy is now the new virtual register. SrcMO.setReg(NewVReg); } else if (!IsVSReg(DstMO.getReg(), MRI) && IsVSReg(SrcMO.getReg(), MRI)) { // This is a copy *from* a VSX register to a non-VSX register. Changed = true; const TargetRegisterClass *DstRC = &PPC::VSLRCRegClass; assert((IsF8Reg(DstMO.getReg(), MRI) || IsVSFReg(DstMO.getReg(), MRI) || IsVSSReg(DstMO.getReg(), MRI)) && "Unknown destination for a VSX copy"); // Copy the VSX value into a new VSX register of the correct subclass. Register NewVReg = MRI.createVirtualRegister(DstRC); BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(TargetOpcode::COPY), NewVReg) .add(SrcMO); // Transform the original copy into a subregister extraction copy. SrcMO.setReg(NewVReg); SrcMO.setSubReg(PPC::sub_64); } } return Changed; } public: bool runOnMachineFunction(MachineFunction &MF) override { // If we don't have VSX on the subtarget, don't do anything. const PPCSubtarget &STI = MF.getSubtarget<PPCSubtarget>(); if (!STI.hasVSX()) return false; TII = STI.getInstrInfo(); bool Changed = false; for (MachineFunction::iterator I = MF.begin(); I != MF.end();) { MachineBasicBlock &B = *I++; if (processBlock(B)) Changed = true; } return Changed; } void getAnalysisUsage(AnalysisUsage &AU) const override { MachineFunctionPass::getAnalysisUsage(AU); } }; } INITIALIZE_PASS(PPCVSXCopy, DEBUG_TYPE, "PowerPC VSX Copy Legalization", false, false) char PPCVSXCopy::ID = 0; FunctionPass* llvm::createPPCVSXCopyPass() { return new PPCVSXCopy(); }
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