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AArch64.cpp
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AArch64.h
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AMDGPU.cpp
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AMDGPU.h
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ARC.cpp
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ARC.h
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ARM.cpp
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ARM.h
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AVR.cpp
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AVR.h
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BPF.cpp
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BPF.h
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Hexagon.cpp
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Hexagon.h
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Lanai.cpp
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Lanai.h
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Le64.cpp
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Le64.h
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MSP430.cpp
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MSP430.h
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Mips.cpp
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Mips.h
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NVPTX.cpp
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NVPTX.h
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OSTargets.cpp
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OSTargets.h
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PNaCl.cpp
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PNaCl.h
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PPC.cpp
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PPC.h
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RISCV.cpp
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RISCV.h
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SPIR.cpp
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SPIR.h
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Sparc.cpp
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Sparc.h
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SystemZ.cpp
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SystemZ.h
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TCE.cpp
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TCE.h
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VE.cpp
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VE.h
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WebAssembly.cpp
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WebAssembly.h
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X86.cpp
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X86.h
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XCore.cpp
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XCore.h
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Editing: RISCV.h
//===--- RISCV.h - Declare RISCV target feature support ---------*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file declares RISCV TargetInfo objects. // //===----------------------------------------------------------------------===// #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H #define LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H #include "clang/Basic/TargetInfo.h" #include "clang/Basic/TargetOptions.h" #include "llvm/ADT/Triple.h" #include "llvm/Support/Compiler.h" namespace clang { namespace targets { // RISC-V Target class RISCVTargetInfo : public TargetInfo { protected: std::string ABI, CPU; bool HasM; bool HasA; bool HasF; bool HasD; bool HasC; bool HasB; public: RISCVTargetInfo(const llvm::Triple &Triple, const TargetOptions &) : TargetInfo(Triple), HasM(false), HasA(false), HasF(false), HasD(false), HasC(false), HasB(false) { LongDoubleWidth = 128; LongDoubleAlign = 128; LongDoubleFormat = &llvm::APFloat::IEEEquad(); SuitableAlign = 128; WCharType = SignedInt; WIntType = UnsignedInt; } bool setCPU(const std::string &Name) override { if (!isValidCPUName(Name)) return false; CPU = Name; return true; } StringRef getABI() const override { return ABI; } void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override; ArrayRef<Builtin::Info> getTargetBuiltins() const override { return None; } BuiltinVaListKind getBuiltinVaListKind() const override { return TargetInfo::VoidPtrBuiltinVaList; } const char *getClobbers() const override { return ""; } ArrayRef<const char *> getGCCRegNames() const override; int getEHDataRegisterNumber(unsigned RegNo) const override { if (RegNo == 0) return 10; else if (RegNo == 1) return 11; else return -1; } ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override; bool validateAsmConstraint(const char *&Name, TargetInfo::ConstraintInfo &Info) const override; bool hasFeature(StringRef Feature) const override; bool handleTargetFeatures(std::vector<std::string> &Features, DiagnosticsEngine &Diags) override; bool hasExtIntType() const override { return true; } }; class LLVM_LIBRARY_VISIBILITY RISCV32TargetInfo : public RISCVTargetInfo { public: RISCV32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) : RISCVTargetInfo(Triple, Opts) { IntPtrType = SignedInt; PtrDiffType = SignedInt; SizeType = UnsignedInt; resetDataLayout("e-m:e-p:32:32-i64:64-n32-S128"); } bool setABI(const std::string &Name) override { if (Name == "ilp32" || Name == "ilp32f" || Name == "ilp32d") { ABI = Name; return true; } return false; } bool isValidCPUName(StringRef Name) const override; void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override; void setMaxAtomicWidth() override { MaxAtomicPromoteWidth = 128; if (HasA) MaxAtomicInlineWidth = 32; } }; class LLVM_LIBRARY_VISIBILITY RISCV64TargetInfo : public RISCVTargetInfo { public: RISCV64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) : RISCVTargetInfo(Triple, Opts) { LongWidth = LongAlign = PointerWidth = PointerAlign = 64; IntMaxType = Int64Type = SignedLong; resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n64-S128"); } bool setABI(const std::string &Name) override { if (Name == "lp64" || Name == "lp64f" || Name == "lp64d") { ABI = Name; return true; } return false; } bool isValidCPUName(StringRef Name) const override; void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override; void setMaxAtomicWidth() override { MaxAtomicPromoteWidth = 128; if (HasA) MaxAtomicInlineWidth = 64; } }; } // namespace targets } // namespace clang #endif // LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H
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