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Current Path: /usr/src/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc

usr / src / contrib / llvm-project / llvm / lib / Target / RISCV / MCTargetDesc /

📁 ..
📄 RISCVAsmBackend.cpp(16.91 KB)
📄 RISCVAsmBackend.h(4.58 KB)
📄 RISCVELFObjectWriter.cpp(5.06 KB)
📄 RISCVELFStreamer.cpp(5.48 KB)
📄 RISCVELFStreamer.h(3.43 KB)
📄 RISCVFixupKinds.h(3.71 KB)
📄 RISCVInstPrinter.cpp(6.35 KB)
📄 RISCVInstPrinter.h(2.81 KB)
📄 RISCVMCAsmInfo.cpp(1.91 KB)
📄 RISCVMCAsmInfo.h(1.01 KB)
📄 RISCVMCCodeEmitter.cpp(14.67 KB)
📄 RISCVMCExpr.cpp(6.73 KB)
📄 RISCVMCExpr.h(2.63 KB)
📄 RISCVMCTargetDesc.cpp(5.44 KB)
📄 RISCVMCTargetDesc.h(1.77 KB)
📄 RISCVTargetStreamer.cpp(4.04 KB)
📄 RISCVTargetStreamer.h(2.23 KB)

Editing: RISCVMCTargetDesc.h

//===-- RISCVMCTargetDesc.h - RISCV Target Descriptions ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides RISCV specific target descriptions.
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H
#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H

#include "llvm/Config/config.h"
#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Support/DataTypes.h"
#include <memory>

namespace llvm {
class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectTargetWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class Target;

MCCodeEmitter *createRISCVMCCodeEmitter(const MCInstrInfo &MCII,
                                        const MCRegisterInfo &MRI,
                                        MCContext &Ctx);

MCAsmBackend *createRISCVAsmBackend(const Target &T, const MCSubtargetInfo &STI,
                                    const MCRegisterInfo &MRI,
                                    const MCTargetOptions &Options);

std::unique_ptr<MCObjectTargetWriter> createRISCVELFObjectWriter(uint8_t OSABI,
                                                                 bool Is64Bit);
}

// Defines symbolic names for RISC-V registers.
#define GET_REGINFO_ENUM
#include "RISCVGenRegisterInfo.inc"

// Defines symbolic names for RISC-V instructions.
#define GET_INSTRINFO_ENUM
#include "RISCVGenInstrInfo.inc"

#define GET_SUBTARGETINFO_ENUM
#include "RISCVGenSubtargetInfo.inc"

#endif

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Editing: RISCVMCTargetDesc.h

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