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AggressiveAntiDepBreaker.cpp
(37.23 KB)
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AggressiveAntiDepBreaker.h
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AllocationOrder.cpp
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AllocationOrder.h
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Analysis.cpp
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AsmPrinter
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AtomicExpandPass.cpp
(71.86 KB)
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BBSectionsPrepare.cpp
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BasicTargetTransformInfo.cpp
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BranchFolding.cpp
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BranchFolding.h
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BranchRelaxation.cpp
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BreakFalseDeps.cpp
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BuiltinGCs.cpp
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CFGuardLongjmp.cpp
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CFIInstrInserter.cpp
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CalcSpillWeights.cpp
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CallingConvLower.cpp
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CodeGen.cpp
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CodeGenPrepare.cpp
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CommandFlags.cpp
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CriticalAntiDepBreaker.cpp
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CriticalAntiDepBreaker.h
(4.22 KB)
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DFAPacketizer.cpp
(10.91 KB)
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DeadMachineInstructionElim.cpp
(6.52 KB)
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DetectDeadLanes.cpp
(20.74 KB)
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DwarfEHPrepare.cpp
(9.01 KB)
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EarlyIfConversion.cpp
(37.51 KB)
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EdgeBundles.cpp
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ExecutionDomainFix.cpp
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ExpandMemCmp.cpp
(33.66 KB)
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ExpandPostRAPseudos.cpp
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ExpandReductions.cpp
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FEntryInserter.cpp
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FaultMaps.cpp
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FinalizeISel.cpp
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FixupStatepointCallerSaved.cpp
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FuncletLayout.cpp
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GCMetadata.cpp
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GCMetadataPrinter.cpp
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GCRootLowering.cpp
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GCStrategy.cpp
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GlobalISel
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GlobalMerge.cpp
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HardwareLoops.cpp
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IfConversion.cpp
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ImplicitNullChecks.cpp
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IndirectBrExpandPass.cpp
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InlineSpiller.cpp
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InterferenceCache.cpp
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InterferenceCache.h
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InterleavedAccessPass.cpp
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InterleavedLoadCombinePass.cpp
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IntrinsicLowering.cpp
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LLVMTargetMachine.cpp
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LatencyPriorityQueue.cpp
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LazyMachineBlockFrequencyInfo.cpp
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LexicalScopes.cpp
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LiveDebugValues.cpp
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LiveDebugVariables.cpp
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LiveDebugVariables.h
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LiveInterval.cpp
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LiveIntervalCalc.cpp
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LiveIntervalUnion.cpp
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LiveIntervals.cpp
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LivePhysRegs.cpp
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LiveRangeCalc.cpp
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LiveRangeEdit.cpp
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LiveRangeShrink.cpp
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LiveRangeUtils.h
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LiveRegMatrix.cpp
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LiveRegUnits.cpp
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LiveStacks.cpp
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LiveVariables.cpp
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LocalStackSlotAllocation.cpp
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LoopTraversal.cpp
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LowLevelType.cpp
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LowerEmuTLS.cpp
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MBFIWrapper.cpp
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MIRCanonicalizerPass.cpp
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MIRNamerPass.cpp
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MIRParser
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MIRPrinter.cpp
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MIRPrintingPass.cpp
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MIRVRegNamerUtils.cpp
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MIRVRegNamerUtils.h
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MachineBasicBlock.cpp
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MachineBlockFrequencyInfo.cpp
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MachineBlockPlacement.cpp
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MachineBranchProbabilityInfo.cpp
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MachineCSE.cpp
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MachineCombiner.cpp
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MachineCopyPropagation.cpp
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MachineDebugify.cpp
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MachineDominanceFrontier.cpp
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MachineDominators.cpp
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MachineFrameInfo.cpp
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MachineFunction.cpp
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MachineFunctionPass.cpp
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MachineFunctionPrinterPass.cpp
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MachineInstr.cpp
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MachineInstrBundle.cpp
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MachineLICM.cpp
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MachineLoopInfo.cpp
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MachineLoopUtils.cpp
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MachineModuleInfo.cpp
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MachineModuleInfoImpls.cpp
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MachineOperand.cpp
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MachineOptimizationRemarkEmitter.cpp
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MachineOutliner.cpp
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MachinePipeliner.cpp
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MachinePostDominators.cpp
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MachineRegionInfo.cpp
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MachineRegisterInfo.cpp
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MachineSSAUpdater.cpp
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MachineScheduler.cpp
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MachineSink.cpp
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MachineSizeOpts.cpp
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MachineStripDebug.cpp
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MachineTraceMetrics.cpp
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MachineVerifier.cpp
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MacroFusion.cpp
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ModuloSchedule.cpp
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NonRelocatableStringpool.cpp
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OptimizePHIs.cpp
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PHIElimination.cpp
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PHIEliminationUtils.cpp
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PHIEliminationUtils.h
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ParallelCG.cpp
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PatchableFunction.cpp
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PeepholeOptimizer.cpp
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PostRAHazardRecognizer.cpp
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PostRASchedulerList.cpp
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PreISelIntrinsicLowering.cpp
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ProcessImplicitDefs.cpp
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PrologEpilogInserter.cpp
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PseudoSourceValue.cpp
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RDFGraph.cpp
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RDFLiveness.cpp
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RDFRegisters.cpp
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ReachingDefAnalysis.cpp
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RegAllocBase.cpp
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RegAllocBase.h
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RegAllocBasic.cpp
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RegAllocFast.cpp
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RegAllocGreedy.cpp
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RegAllocPBQP.cpp
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RegUsageInfoCollector.cpp
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RegUsageInfoPropagate.cpp
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RegisterClassInfo.cpp
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RegisterCoalescer.cpp
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RegisterCoalescer.h
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RegisterPressure.cpp
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RegisterScavenging.cpp
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RegisterUsageInfo.cpp
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RenameIndependentSubregs.cpp
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ResetMachineFunctionPass.cpp
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SafeStack.cpp
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SafeStackLayout.cpp
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SafeStackLayout.h
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ScalarizeMaskedMemIntrin.cpp
(31.46 KB)
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ScheduleDAG.cpp
(21.34 KB)
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ScheduleDAGInstrs.cpp
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ScheduleDAGPrinter.cpp
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ScoreboardHazardRecognizer.cpp
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SelectionDAG
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ShadowStackGCLowering.cpp
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ShrinkWrap.cpp
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SjLjEHPrepare.cpp
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SlotIndexes.cpp
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SpillPlacement.cpp
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SpillPlacement.h
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SplitKit.cpp
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SplitKit.h
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StackColoring.cpp
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StackMapLivenessAnalysis.cpp
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StackMaps.cpp
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StackProtector.cpp
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StackSlotColoring.cpp
(17.12 KB)
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SwiftErrorValueTracking.cpp
(11.37 KB)
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SwitchLoweringUtils.cpp
(18.33 KB)
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TailDuplication.cpp
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TailDuplicator.cpp
(38.29 KB)
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TargetFrameLoweringImpl.cpp
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TargetInstrInfo.cpp
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TargetLoweringBase.cpp
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TargetLoweringObjectFileImpl.cpp
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TargetOptionsImpl.cpp
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TargetPassConfig.cpp
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TargetRegisterInfo.cpp
(19.15 KB)
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TargetSchedule.cpp
(13.16 KB)
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TargetSubtargetInfo.cpp
(1.89 KB)
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TwoAddressInstructionPass.cpp
(62.08 KB)
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TypePromotion.cpp
(32.46 KB)
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UnreachableBlockElim.cpp
(7.48 KB)
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ValueTypes.cpp
(19.87 KB)
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VirtRegMap.cpp
(21.4 KB)
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WasmEHPrepare.cpp
(17.48 KB)
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WinEHPrepare.cpp
(51.16 KB)
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XRayInstrumentation.cpp
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Editing: ScheduleDAG.cpp
//===- ScheduleDAG.cpp - Implement the ScheduleDAG class ------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // /// \file Implements the ScheduleDAG class, which is a base class used by /// scheduling implementation classes. // //===----------------------------------------------------------------------===// #include "llvm/CodeGen/ScheduleDAG.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/iterator_range.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/ScheduleHazardRecognizer.h" #include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/CodeGen/TargetInstrInfo.h" #include "llvm/CodeGen/TargetRegisterInfo.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/Config/llvm-config.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" #include <algorithm> #include <cassert> #include <iterator> #include <limits> #include <utility> #include <vector> using namespace llvm; #define DEBUG_TYPE "pre-RA-sched" STATISTIC(NumNewPredsAdded, "Number of times a single predecessor was added"); STATISTIC(NumTopoInits, "Number of times the topological order has been recomputed"); #ifndef NDEBUG static cl::opt<bool> StressSchedOpt( "stress-sched", cl::Hidden, cl::init(false), cl::desc("Stress test instruction scheduling")); #endif void SchedulingPriorityQueue::anchor() {} ScheduleDAG::ScheduleDAG(MachineFunction &mf) : TM(mf.getTarget()), TII(mf.getSubtarget().getInstrInfo()), TRI(mf.getSubtarget().getRegisterInfo()), MF(mf), MRI(mf.getRegInfo()) { #ifndef NDEBUG StressSched = StressSchedOpt; #endif } ScheduleDAG::~ScheduleDAG() = default; void ScheduleDAG::clearDAG() { SUnits.clear(); EntrySU = SUnit(); ExitSU = SUnit(); } const MCInstrDesc *ScheduleDAG::getNodeDesc(const SDNode *Node) const { if (!Node || !Node->isMachineOpcode()) return nullptr; return &TII->get(Node->getMachineOpcode()); } LLVM_DUMP_METHOD void SDep::dump(const TargetRegisterInfo *TRI) const { switch (getKind()) { case Data: dbgs() << "Data"; break; case Anti: dbgs() << "Anti"; break; case Output: dbgs() << "Out "; break; case Order: dbgs() << "Ord "; break; } switch (getKind()) { case Data: dbgs() << " Latency=" << getLatency(); if (TRI && isAssignedRegDep()) dbgs() << " Reg=" << printReg(getReg(), TRI); break; case Anti: case Output: dbgs() << " Latency=" << getLatency(); break; case Order: dbgs() << " Latency=" << getLatency(); switch(Contents.OrdKind) { case Barrier: dbgs() << " Barrier"; break; case MayAliasMem: case MustAliasMem: dbgs() << " Memory"; break; case Artificial: dbgs() << " Artificial"; break; case Weak: dbgs() << " Weak"; break; case Cluster: dbgs() << " Cluster"; break; } break; } } bool SUnit::addPred(const SDep &D, bool Required) { // If this node already has this dependence, don't add a redundant one. for (SDep &PredDep : Preds) { // Zero-latency weak edges may be added purely for heuristic ordering. Don't // add them if another kind of edge already exists. if (!Required && PredDep.getSUnit() == D.getSUnit()) return false; if (PredDep.overlaps(D)) { // Extend the latency if needed. Equivalent to // removePred(PredDep) + addPred(D). if (PredDep.getLatency() < D.getLatency()) { SUnit *PredSU = PredDep.getSUnit(); // Find the corresponding successor in N. SDep ForwardD = PredDep; ForwardD.setSUnit(this); for (SDep &SuccDep : PredSU->Succs) { if (SuccDep == ForwardD) { SuccDep.setLatency(D.getLatency()); break; } } PredDep.setLatency(D.getLatency()); } return false; } } // Now add a corresponding succ to N. SDep P = D; P.setSUnit(this); SUnit *N = D.getSUnit(); // Update the bookkeeping. if (D.getKind() == SDep::Data) { assert(NumPreds < std::numeric_limits<unsigned>::max() && "NumPreds will overflow!"); assert(N->NumSuccs < std::numeric_limits<unsigned>::max() && "NumSuccs will overflow!"); ++NumPreds; ++N->NumSuccs; } if (!N->isScheduled) { if (D.isWeak()) { ++WeakPredsLeft; } else { assert(NumPredsLeft < std::numeric_limits<unsigned>::max() && "NumPredsLeft will overflow!"); ++NumPredsLeft; } } if (!isScheduled) { if (D.isWeak()) { ++N->WeakSuccsLeft; } else { assert(N->NumSuccsLeft < std::numeric_limits<unsigned>::max() && "NumSuccsLeft will overflow!"); ++N->NumSuccsLeft; } } Preds.push_back(D); N->Succs.push_back(P); if (P.getLatency() != 0) { this->setDepthDirty(); N->setHeightDirty(); } return true; } void SUnit::removePred(const SDep &D) { // Find the matching predecessor. SmallVectorImpl<SDep>::iterator I = llvm::find(Preds, D); if (I == Preds.end()) return; // Find the corresponding successor in N. SDep P = D; P.setSUnit(this); SUnit *N = D.getSUnit(); SmallVectorImpl<SDep>::iterator Succ = llvm::find(N->Succs, P); assert(Succ != N->Succs.end() && "Mismatching preds / succs lists!"); N->Succs.erase(Succ); Preds.erase(I); // Update the bookkeeping. if (P.getKind() == SDep::Data) { assert(NumPreds > 0 && "NumPreds will underflow!"); assert(N->NumSuccs > 0 && "NumSuccs will underflow!"); --NumPreds; --N->NumSuccs; } if (!N->isScheduled) { if (D.isWeak()) --WeakPredsLeft; else { assert(NumPredsLeft > 0 && "NumPredsLeft will underflow!"); --NumPredsLeft; } } if (!isScheduled) { if (D.isWeak()) --N->WeakSuccsLeft; else { assert(N->NumSuccsLeft > 0 && "NumSuccsLeft will underflow!"); --N->NumSuccsLeft; } } if (P.getLatency() != 0) { this->setDepthDirty(); N->setHeightDirty(); } } void SUnit::setDepthDirty() { if (!isDepthCurrent) return; SmallVector<SUnit*, 8> WorkList; WorkList.push_back(this); do { SUnit *SU = WorkList.pop_back_val(); SU->isDepthCurrent = false; for (SDep &SuccDep : SU->Succs) { SUnit *SuccSU = SuccDep.getSUnit(); if (SuccSU->isDepthCurrent) WorkList.push_back(SuccSU); } } while (!WorkList.empty()); } void SUnit::setHeightDirty() { if (!isHeightCurrent) return; SmallVector<SUnit*, 8> WorkList; WorkList.push_back(this); do { SUnit *SU = WorkList.pop_back_val(); SU->isHeightCurrent = false; for (SDep &PredDep : SU->Preds) { SUnit *PredSU = PredDep.getSUnit(); if (PredSU->isHeightCurrent) WorkList.push_back(PredSU); } } while (!WorkList.empty()); } void SUnit::setDepthToAtLeast(unsigned NewDepth) { if (NewDepth <= getDepth()) return; setDepthDirty(); Depth = NewDepth; isDepthCurrent = true; } void SUnit::setHeightToAtLeast(unsigned NewHeight) { if (NewHeight <= getHeight()) return; setHeightDirty(); Height = NewHeight; isHeightCurrent = true; } /// Calculates the maximal path from the node to the exit. void SUnit::ComputeDepth() { SmallVector<SUnit*, 8> WorkList; WorkList.push_back(this); do { SUnit *Cur = WorkList.back(); bool Done = true; unsigned MaxPredDepth = 0; for (const SDep &PredDep : Cur->Preds) { SUnit *PredSU = PredDep.getSUnit(); if (PredSU->isDepthCurrent) MaxPredDepth = std::max(MaxPredDepth, PredSU->Depth + PredDep.getLatency()); else { Done = false; WorkList.push_back(PredSU); } } if (Done) { WorkList.pop_back(); if (MaxPredDepth != Cur->Depth) { Cur->setDepthDirty(); Cur->Depth = MaxPredDepth; } Cur->isDepthCurrent = true; } } while (!WorkList.empty()); } /// Calculates the maximal path from the node to the entry. void SUnit::ComputeHeight() { SmallVector<SUnit*, 8> WorkList; WorkList.push_back(this); do { SUnit *Cur = WorkList.back(); bool Done = true; unsigned MaxSuccHeight = 0; for (const SDep &SuccDep : Cur->Succs) { SUnit *SuccSU = SuccDep.getSUnit(); if (SuccSU->isHeightCurrent) MaxSuccHeight = std::max(MaxSuccHeight, SuccSU->Height + SuccDep.getLatency()); else { Done = false; WorkList.push_back(SuccSU); } } if (Done) { WorkList.pop_back(); if (MaxSuccHeight != Cur->Height) { Cur->setHeightDirty(); Cur->Height = MaxSuccHeight; } Cur->isHeightCurrent = true; } } while (!WorkList.empty()); } void SUnit::biasCriticalPath() { if (NumPreds < 2) return; SUnit::pred_iterator BestI = Preds.begin(); unsigned MaxDepth = BestI->getSUnit()->getDepth(); for (SUnit::pred_iterator I = std::next(BestI), E = Preds.end(); I != E; ++I) { if (I->getKind() == SDep::Data && I->getSUnit()->getDepth() > MaxDepth) BestI = I; } if (BestI != Preds.begin()) std::swap(*Preds.begin(), *BestI); } #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void SUnit::dumpAttributes() const { dbgs() << " # preds left : " << NumPredsLeft << "\n"; dbgs() << " # succs left : " << NumSuccsLeft << "\n"; if (WeakPredsLeft) dbgs() << " # weak preds left : " << WeakPredsLeft << "\n"; if (WeakSuccsLeft) dbgs() << " # weak succs left : " << WeakSuccsLeft << "\n"; dbgs() << " # rdefs left : " << NumRegDefsLeft << "\n"; dbgs() << " Latency : " << Latency << "\n"; dbgs() << " Depth : " << getDepth() << "\n"; dbgs() << " Height : " << getHeight() << "\n"; } LLVM_DUMP_METHOD void ScheduleDAG::dumpNodeName(const SUnit &SU) const { if (&SU == &EntrySU) dbgs() << "EntrySU"; else if (&SU == &ExitSU) dbgs() << "ExitSU"; else dbgs() << "SU(" << SU.NodeNum << ")"; } LLVM_DUMP_METHOD void ScheduleDAG::dumpNodeAll(const SUnit &SU) const { dumpNode(SU); SU.dumpAttributes(); if (SU.Preds.size() > 0) { dbgs() << " Predecessors:\n"; for (const SDep &Dep : SU.Preds) { dbgs() << " "; dumpNodeName(*Dep.getSUnit()); dbgs() << ": "; Dep.dump(TRI); dbgs() << '\n'; } } if (SU.Succs.size() > 0) { dbgs() << " Successors:\n"; for (const SDep &Dep : SU.Succs) { dbgs() << " "; dumpNodeName(*Dep.getSUnit()); dbgs() << ": "; Dep.dump(TRI); dbgs() << '\n'; } } } #endif #ifndef NDEBUG unsigned ScheduleDAG::VerifyScheduledDAG(bool isBottomUp) { bool AnyNotSched = false; unsigned DeadNodes = 0; for (const SUnit &SUnit : SUnits) { if (!SUnit.isScheduled) { if (SUnit.NumPreds == 0 && SUnit.NumSuccs == 0) { ++DeadNodes; continue; } if (!AnyNotSched) dbgs() << "*** Scheduling failed! ***\n"; dumpNode(SUnit); dbgs() << "has not been scheduled!\n"; AnyNotSched = true; } if (SUnit.isScheduled && (isBottomUp ? SUnit.getHeight() : SUnit.getDepth()) > unsigned(std::numeric_limits<int>::max())) { if (!AnyNotSched) dbgs() << "*** Scheduling failed! ***\n"; dumpNode(SUnit); dbgs() << "has an unexpected " << (isBottomUp ? "Height" : "Depth") << " value!\n"; AnyNotSched = true; } if (isBottomUp) { if (SUnit.NumSuccsLeft != 0) { if (!AnyNotSched) dbgs() << "*** Scheduling failed! ***\n"; dumpNode(SUnit); dbgs() << "has successors left!\n"; AnyNotSched = true; } } else { if (SUnit.NumPredsLeft != 0) { if (!AnyNotSched) dbgs() << "*** Scheduling failed! ***\n"; dumpNode(SUnit); dbgs() << "has predecessors left!\n"; AnyNotSched = true; } } } assert(!AnyNotSched); return SUnits.size() - DeadNodes; } #endif void ScheduleDAGTopologicalSort::InitDAGTopologicalSorting() { // The idea of the algorithm is taken from // "Online algorithms for managing the topological order of // a directed acyclic graph" by David J. Pearce and Paul H.J. Kelly // This is the MNR algorithm, which was first introduced by // A. Marchetti-Spaccamela, U. Nanni and H. Rohnert in // "Maintaining a topological order under edge insertions". // // Short description of the algorithm: // // Topological ordering, ord, of a DAG maps each node to a topological // index so that for all edges X->Y it is the case that ord(X) < ord(Y). // // This means that if there is a path from the node X to the node Z, // then ord(X) < ord(Z). // // This property can be used to check for reachability of nodes: // if Z is reachable from X, then an insertion of the edge Z->X would // create a cycle. // // The algorithm first computes a topological ordering for the DAG by // initializing the Index2Node and Node2Index arrays and then tries to keep // the ordering up-to-date after edge insertions by reordering the DAG. // // On insertion of the edge X->Y, the algorithm first marks by calling DFS // the nodes reachable from Y, and then shifts them using Shift to lie // immediately after X in Index2Node. // Cancel pending updates, mark as valid. Dirty = false; Updates.clear(); unsigned DAGSize = SUnits.size(); std::vector<SUnit*> WorkList; WorkList.reserve(DAGSize); Index2Node.resize(DAGSize); Node2Index.resize(DAGSize); // Initialize the data structures. if (ExitSU) WorkList.push_back(ExitSU); for (SUnit &SU : SUnits) { int NodeNum = SU.NodeNum; unsigned Degree = SU.Succs.size(); // Temporarily use the Node2Index array as scratch space for degree counts. Node2Index[NodeNum] = Degree; // Is it a node without dependencies? if (Degree == 0) { assert(SU.Succs.empty() && "SUnit should have no successors"); // Collect leaf nodes. WorkList.push_back(&SU); } } int Id = DAGSize; while (!WorkList.empty()) { SUnit *SU = WorkList.back(); WorkList.pop_back(); if (SU->NodeNum < DAGSize) Allocate(SU->NodeNum, --Id); for (const SDep &PredDep : SU->Preds) { SUnit *SU = PredDep.getSUnit(); if (SU->NodeNum < DAGSize && !--Node2Index[SU->NodeNum]) // If all dependencies of the node are processed already, // then the node can be computed now. WorkList.push_back(SU); } } Visited.resize(DAGSize); NumTopoInits++; #ifndef NDEBUG // Check correctness of the ordering for (SUnit &SU : SUnits) { for (const SDep &PD : SU.Preds) { assert(Node2Index[SU.NodeNum] > Node2Index[PD.getSUnit()->NodeNum] && "Wrong topological sorting"); } } #endif } void ScheduleDAGTopologicalSort::FixOrder() { // Recompute from scratch after new nodes have been added. if (Dirty) { InitDAGTopologicalSorting(); return; } // Otherwise apply updates one-by-one. for (auto &U : Updates) AddPred(U.first, U.second); Updates.clear(); } void ScheduleDAGTopologicalSort::AddPredQueued(SUnit *Y, SUnit *X) { // Recomputing the order from scratch is likely more efficient than applying // updates one-by-one for too many updates. The current cut-off is arbitrarily // chosen. Dirty = Dirty || Updates.size() > 10; if (Dirty) return; Updates.emplace_back(Y, X); } void ScheduleDAGTopologicalSort::AddPred(SUnit *Y, SUnit *X) { int UpperBound, LowerBound; LowerBound = Node2Index[Y->NodeNum]; UpperBound = Node2Index[X->NodeNum]; bool HasLoop = false; // Is Ord(X) < Ord(Y) ? if (LowerBound < UpperBound) { // Update the topological order. Visited.reset(); DFS(Y, UpperBound, HasLoop); assert(!HasLoop && "Inserted edge creates a loop!"); // Recompute topological indexes. Shift(Visited, LowerBound, UpperBound); } NumNewPredsAdded++; } void ScheduleDAGTopologicalSort::RemovePred(SUnit *M, SUnit *N) { // InitDAGTopologicalSorting(); } void ScheduleDAGTopologicalSort::DFS(const SUnit *SU, int UpperBound, bool &HasLoop) { std::vector<const SUnit*> WorkList; WorkList.reserve(SUnits.size()); WorkList.push_back(SU); do { SU = WorkList.back(); WorkList.pop_back(); Visited.set(SU->NodeNum); for (const SDep &SuccDep : make_range(SU->Succs.rbegin(), SU->Succs.rend())) { unsigned s = SuccDep.getSUnit()->NodeNum; // Edges to non-SUnits are allowed but ignored (e.g. ExitSU). if (s >= Node2Index.size()) continue; if (Node2Index[s] == UpperBound) { HasLoop = true; return; } // Visit successors if not already and in affected region. if (!Visited.test(s) && Node2Index[s] < UpperBound) { WorkList.push_back(SuccDep.getSUnit()); } } } while (!WorkList.empty()); } std::vector<int> ScheduleDAGTopologicalSort::GetSubGraph(const SUnit &StartSU, const SUnit &TargetSU, bool &Success) { std::vector<const SUnit*> WorkList; int LowerBound = Node2Index[StartSU.NodeNum]; int UpperBound = Node2Index[TargetSU.NodeNum]; bool Found = false; BitVector VisitedBack; std::vector<int> Nodes; if (LowerBound > UpperBound) { Success = false; return Nodes; } WorkList.reserve(SUnits.size()); Visited.reset(); // Starting from StartSU, visit all successors up // to UpperBound. WorkList.push_back(&StartSU); do { const SUnit *SU = WorkList.back(); WorkList.pop_back(); for (int I = SU->Succs.size()-1; I >= 0; --I) { const SUnit *Succ = SU->Succs[I].getSUnit(); unsigned s = Succ->NodeNum; // Edges to non-SUnits are allowed but ignored (e.g. ExitSU). if (Succ->isBoundaryNode()) continue; if (Node2Index[s] == UpperBound) { Found = true; continue; } // Visit successors if not already and in affected region. if (!Visited.test(s) && Node2Index[s] < UpperBound) { Visited.set(s); WorkList.push_back(Succ); } } } while (!WorkList.empty()); if (!Found) { Success = false; return Nodes; } WorkList.clear(); VisitedBack.resize(SUnits.size()); Found = false; // Starting from TargetSU, visit all predecessors up // to LowerBound. SUs that are visited by the two // passes are added to Nodes. WorkList.push_back(&TargetSU); do { const SUnit *SU = WorkList.back(); WorkList.pop_back(); for (int I = SU->Preds.size()-1; I >= 0; --I) { const SUnit *Pred = SU->Preds[I].getSUnit(); unsigned s = Pred->NodeNum; // Edges to non-SUnits are allowed but ignored (e.g. EntrySU). if (Pred->isBoundaryNode()) continue; if (Node2Index[s] == LowerBound) { Found = true; continue; } if (!VisitedBack.test(s) && Visited.test(s)) { VisitedBack.set(s); WorkList.push_back(Pred); Nodes.push_back(s); } } } while (!WorkList.empty()); assert(Found && "Error in SUnit Graph!"); Success = true; return Nodes; } void ScheduleDAGTopologicalSort::Shift(BitVector& Visited, int LowerBound, int UpperBound) { std::vector<int> L; int shift = 0; int i; for (i = LowerBound; i <= UpperBound; ++i) { // w is node at topological index i. int w = Index2Node[i]; if (Visited.test(w)) { // Unmark. Visited.reset(w); L.push_back(w); shift = shift + 1; } else { Allocate(w, i - shift); } } for (unsigned LI : L) { Allocate(LI, i - shift); i = i + 1; } } bool ScheduleDAGTopologicalSort::WillCreateCycle(SUnit *TargetSU, SUnit *SU) { FixOrder(); // Is SU reachable from TargetSU via successor edges? if (IsReachable(SU, TargetSU)) return true; for (const SDep &PredDep : TargetSU->Preds) if (PredDep.isAssignedRegDep() && IsReachable(SU, PredDep.getSUnit())) return true; return false; } void ScheduleDAGTopologicalSort::AddSUnitWithoutPredecessors(const SUnit *SU) { assert(SU->NodeNum == Index2Node.size() && "Node cannot be added at the end"); assert(SU->NumPreds == 0 && "Can only add SU's with no predecessors"); Node2Index.push_back(Index2Node.size()); Index2Node.push_back(SU->NodeNum); Visited.resize(Node2Index.size()); } bool ScheduleDAGTopologicalSort::IsReachable(const SUnit *SU, const SUnit *TargetSU) { FixOrder(); // If insertion of the edge SU->TargetSU would create a cycle // then there is a path from TargetSU to SU. int UpperBound, LowerBound; LowerBound = Node2Index[TargetSU->NodeNum]; UpperBound = Node2Index[SU->NodeNum]; bool HasLoop = false; // Is Ord(TargetSU) < Ord(SU) ? if (LowerBound < UpperBound) { Visited.reset(); // There may be a path from TargetSU to SU. Check for it. DFS(TargetSU, UpperBound, HasLoop); } return HasLoop; } void ScheduleDAGTopologicalSort::Allocate(int n, int index) { Node2Index[n] = index; Index2Node[index] = n; } ScheduleDAGTopologicalSort:: ScheduleDAGTopologicalSort(std::vector<SUnit> &sunits, SUnit *exitsu) : SUnits(sunits), ExitSU(exitsu) {} ScheduleHazardRecognizer::~ScheduleHazardRecognizer() = default;
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