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📄 AsmPrinterHandler.h(2.6 KB)
📄 AtomicExpandUtils.h(2.49 KB)
📄 BasicTTIImpl.h(73.64 KB)
📄 BuiltinGCs.h(1008 B)
📄 CSEConfigBase.h(1.09 KB)
📄 CalcSpillWeights.h(4.69 KB)
📄 CallingConvLower.h(21 KB)
📄 CommandFlags.h(3.65 KB)
📄 CostTable.h(1.87 KB)
📄 DAGCombine.h(606 B)
📄 DFAPacketizer.h(7.47 KB)
📄 DIE.h(32.19 KB)
📄 DIEValue.def(1.4 KB)
📄 DbgEntityHistoryCalculator.h(4.37 KB)
📄 DebugHandlerBase.h(4.68 KB)
📄 DwarfStringPoolEntry.h(2.18 KB)
📄 EdgeBundles.h(2.13 KB)
📄 ExecutionDomainFix.h(7.72 KB)
📄 ExpandReductions.h(726 B)
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📄 FunctionLoweringInfo.h(9.68 KB)
📄 GCMetadata.h(7.24 KB)
📄 GCMetadataPrinter.h(2.46 KB)
📄 GCStrategy.h(5.25 KB)
📁 GlobalISel
📄 ISDOpcodes.h(52.75 KB)
📄 IndirectThunks.h(3.85 KB)
📄 IntrinsicLowering.h(1.67 KB)
📄 LatencyPriorityQueue.h(3.09 KB)
📄 LazyMachineBlockFrequencyInfo.h(2.82 KB)
📄 LexicalScopes.h(10.06 KB)
📄 LinkAllAsmWriterComponents.h(1.34 KB)
📄 LinkAllCodegenComponents.h(2.18 KB)
📄 LiveInterval.h(37.24 KB)
📄 LiveIntervalCalc.h(2.91 KB)
📄 LiveIntervalUnion.h(6.93 KB)
📄 LiveIntervals.h(19.86 KB)
📄 LivePhysRegs.h(7.51 KB)
📄 LiveRangeCalc.h(11.49 KB)
📄 LiveRangeEdit.h(10.45 KB)
📄 LiveRegMatrix.h(6.18 KB)
📄 LiveRegUnits.h(6.24 KB)
📄 LiveStacks.h(3.35 KB)
📄 LiveVariables.h(12.98 KB)
📄 LoopTraversal.h(4.38 KB)
📄 LowLevelType.h(1.28 KB)
📄 MBFIWrapper.h(1.58 KB)
📄 MIRFormatter.h(3.13 KB)
📁 MIRParser
📄 MIRPrinter.h(1.73 KB)
📄 MIRYamlMapping.h(23.95 KB)
📄 MachORelocation.h(2.19 KB)
📄 MachineBasicBlock.h(42.95 KB)
📄 MachineBlockFrequencyInfo.h(3.21 KB)
📄 MachineBranchProbabilityInfo.h(2.69 KB)
📄 MachineCombinerPattern.h(3.5 KB)
📄 MachineConstantPool.h(5.25 KB)
📄 MachineDominanceFrontier.h(2.93 KB)
📄 MachineDominators.h(9.59 KB)
📄 MachineFrameInfo.h(34.84 KB)
📄 MachineFunction.h(42.94 KB)
📄 MachineFunctionPass.h(2.93 KB)
📄 MachineInstr.h(73.72 KB)
📄 MachineInstrBuilder.h(22.84 KB)
📄 MachineInstrBundle.h(10.16 KB)
📄 MachineInstrBundleIterator.h(10.92 KB)
📄 MachineJumpTableInfo.h(4.66 KB)
📄 MachineLoopInfo.h(7.3 KB)
📄 MachineLoopUtils.h(1.74 KB)
📄 MachineMemOperand.h(12.69 KB)
📄 MachineModuleInfo.h(9.88 KB)
📄 MachineModuleInfoImpls.h(3.36 KB)
📄 MachineOperand.h(37.64 KB)
📄 MachineOptimizationRemarkEmitter.h(8.99 KB)
📄 MachineOutliner.h(8.04 KB)
📄 MachinePassRegistry.h(6.1 KB)
📄 MachinePipeliner.h(21.17 KB)
📄 MachinePostDominators.h(2.93 KB)
📄 MachineRegionInfo.h(5.93 KB)
📄 MachineRegisterInfo.h(46.75 KB)
📄 MachineSSAUpdater.h(4.37 KB)
📄 MachineScheduler.h(36.6 KB)
📄 MachineSizeOpts.h(1.86 KB)
📄 MachineTraceMetrics.h(17.17 KB)
📄 MacroFusion.h(1.96 KB)
📄 ModuloSchedule.h(15.8 KB)
📄 NonRelocatableStringpool.h(2.9 KB)
📁 PBQP
📄 PBQPRAConstraint.h(1.83 KB)
📄 ParallelCG.h(1.66 KB)
📄 Passes.h(18.96 KB)
📄 PreISelIntrinsicLowering.h(944 B)
📄 PseudoSourceValue.h(6.21 KB)
📄 RDFGraph.h(33.73 KB)
📄 RDFLiveness.h(5.01 KB)
📄 RDFRegisters.h(6.51 KB)
📄 ReachingDefAnalysis.h(10.68 KB)
📄 RegAllocPBQP.h(16.47 KB)
📄 RegAllocRegistry.h(2.27 KB)
📄 Register.h(5.61 KB)
📄 RegisterClassInfo.h(4.86 KB)
📄 RegisterPressure.h(21.04 KB)
📄 RegisterScavenging.h(8.73 KB)
📄 RegisterUsageInfo.h(2.3 KB)
📄 ResourcePriorityQueue.h(4.19 KB)
📄 RuntimeLibcalls.h(3.05 KB)
📄 SDNodeProperties.td(1.57 KB)
📄 ScheduleDAG.h(28.92 KB)
📄 ScheduleDAGInstrs.h(15.49 KB)
📄 ScheduleDAGMutation.h(1021 B)
📄 ScheduleDFS.h(5.79 KB)
📄 ScheduleHazardRecognizer.h(4.65 KB)
📄 SchedulerRegistry.h(4.27 KB)
📄 ScoreboardHazardRecognizer.h(3.7 KB)
📄 SelectionDAG.h(89.12 KB)
📄 SelectionDAGAddressAnalysis.h(3.58 KB)
📄 SelectionDAGISel.h(13.48 KB)
📄 SelectionDAGNodes.h(91.77 KB)
📄 SelectionDAGTargetInfo.h(7.99 KB)
📄 SlotIndexes.h(24.12 KB)
📄 Spiller.h(1.16 KB)
📄 StackMaps.h(11.45 KB)
📄 StackProtector.h(4.1 KB)
📄 SwiftErrorValueTracking.h(3.87 KB)
📄 SwitchLoweringUtils.h(9.51 KB)
📄 TailDuplicator.h(5.54 KB)
📄 TargetCallingConv.h(8.26 KB)
📄 TargetFrameLowering.h(19.21 KB)
📄 TargetInstrInfo.h(84.48 KB)
📄 TargetLowering.h(194.17 KB)
📄 TargetLoweringObjectFileImpl.h(11.63 KB)
📄 TargetOpcodes.h(1.37 KB)
📄 TargetPassConfig.h(17.9 KB)
📄 TargetRegisterInfo.h(48.65 KB)
📄 TargetSchedule.h(7.75 KB)
📄 TargetSubtargetInfo.h(12.53 KB)
📄 UnreachableBlockElim.h(1.39 KB)
📄 ValueTypes.h(17.2 KB)
📄 ValueTypes.td(11.42 KB)
📄 VirtRegMap.h(6.37 KB)
📄 WasmEHFuncInfo.h(1.92 KB)
📄 WinEHFuncInfo.h(4.01 KB)

Editing: ScheduleDFS.h

//===- ScheduleDFS.h - ILP metric for ScheduleDAGInstrs ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Definition of an ILP metric for machine level instruction scheduling.
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_CODEGEN_SCHEDULEDFS_H
#define LLVM_CODEGEN_SCHEDULEDFS_H

#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include <cassert>
#include <cstdint>
#include <vector>

namespace llvm {

template <typename T> class ArrayRef;
class raw_ostream;

/// Represent the ILP of the subDAG rooted at a DAG node.
///
/// ILPValues summarize the DAG subtree rooted at each node. ILPValues are
/// valid for all nodes regardless of their subtree membership.
///
/// When computed using bottom-up DFS, this metric assumes that the DAG is a
/// forest of trees with roots at the bottom of the schedule branching upward.
struct ILPValue {
  unsigned InstrCount;
  /// Length may either correspond to depth or height, depending on direction,
  /// and cycles or nodes depending on context.
  unsigned Length;

ILPValue(unsigned count, unsigned length):
    InstrCount(count), Length(length) {}

// Order by the ILP metric's value.
  bool operator<(ILPValue RHS) const {
    return (uint64_t)InstrCount * RHS.Length
      < (uint64_t)Length * RHS.InstrCount;
  }
  bool operator>(ILPValue RHS) const {
    return RHS < *this;
  }
  bool operator<=(ILPValue RHS) const {
    return (uint64_t)InstrCount * RHS.Length
      <= (uint64_t)Length * RHS.InstrCount;
  }
  bool operator>=(ILPValue RHS) const {
    return RHS <= *this;
  }

void print(raw_ostream &OS) const;

void dump() const;
};

/// Compute the values of each DAG node for various metrics during DFS.
class SchedDFSResult {
  friend class SchedDFSImpl;

static const unsigned InvalidSubtreeID = ~0u;

/// Per-SUnit data computed during DFS for various metrics.
  ///
  /// A node's SubtreeID is set to itself when it is visited to indicate that it
  /// is the root of a subtree. Later it is set to its parent to indicate an
  /// interior node. Finally, it is set to a representative subtree ID during
  /// finalization.
  struct NodeData {
    unsigned InstrCount = 0;
    unsigned SubtreeID = InvalidSubtreeID;

NodeData() = default;
  };

/// Per-Subtree data computed during DFS.
  struct TreeData {
    unsigned ParentTreeID = InvalidSubtreeID;
    unsigned SubInstrCount = 0;

TreeData() = default;
  };

/// Record a connection between subtrees and the connection level.
  struct Connection {
    unsigned TreeID;
    unsigned Level;

Connection(unsigned tree, unsigned level): TreeID(tree), Level(level) {}
  };

bool IsBottomUp;
  unsigned SubtreeLimit;
  /// DFS results for each SUnit in this DAG.
  std::vector<NodeData> DFSNodeData;

// Store per-tree data indexed on tree ID,
  SmallVector<TreeData, 16> DFSTreeData;

// For each subtree discovered during DFS, record its connections to other
  // subtrees.
  std::vector<SmallVector<Connection, 4>> SubtreeConnections;

/// Cache the current connection level of each subtree.
  /// This mutable array is updated during scheduling.
  std::vector<unsigned> SubtreeConnectLevels;

public:
  SchedDFSResult(bool IsBU, unsigned lim)
    : IsBottomUp(IsBU), SubtreeLimit(lim) {}

/// Get the node cutoff before subtrees are considered significant.
  unsigned getSubtreeLimit() const { return SubtreeLimit; }

/// Return true if this DFSResult is uninitialized.
  ///
  /// resize() initializes DFSResult, while compute() populates it.
  bool empty() const { return DFSNodeData.empty(); }

/// Clear the results.
  void clear() {
    DFSNodeData.clear();
    DFSTreeData.clear();
    SubtreeConnections.clear();
    SubtreeConnectLevels.clear();
  }

/// Initialize the result data with the size of the DAG.
  void resize(unsigned NumSUnits) {
    DFSNodeData.resize(NumSUnits);
  }

/// Compute various metrics for the DAG with given roots.
  void compute(ArrayRef<SUnit> SUnits);

/// Get the number of instructions in the given subtree and its
  /// children.
  unsigned getNumInstrs(const SUnit *SU) const {
    return DFSNodeData[SU->NodeNum].InstrCount;
  }

/// Get the number of instructions in the given subtree not including
  /// children.
  unsigned getNumSubInstrs(unsigned SubtreeID) const {
    return DFSTreeData[SubtreeID].SubInstrCount;
  }

/// Get the ILP value for a DAG node.
  ///
  /// A leaf node has an ILP of 1/1.
  ILPValue getILP(const SUnit *SU) const {
    return ILPValue(DFSNodeData[SU->NodeNum].InstrCount, 1 + SU->getDepth());
  }

/// The number of subtrees detected in this DAG.
  unsigned getNumSubtrees() const { return SubtreeConnectLevels.size(); }

/// Get the ID of the subtree the given DAG node belongs to.
  ///
  /// For convenience, if DFSResults have not been computed yet, give everything
  /// tree ID 0.
  unsigned getSubtreeID(const SUnit *SU) const {
    if (empty())
      return 0;
    assert(SU->NodeNum < DFSNodeData.size() &&  "New Node");
    return DFSNodeData[SU->NodeNum].SubtreeID;
  }

/// Get the connection level of a subtree.
  ///
  /// For bottom-up trees, the connection level is the latency depth (in cycles)
  /// of the deepest connection to another subtree.
  unsigned getSubtreeLevel(unsigned SubtreeID) const {
    return SubtreeConnectLevels[SubtreeID];
  }

/// Scheduler callback to update SubtreeConnectLevels when a tree is
  /// initially scheduled.
  void scheduleTree(unsigned SubtreeID);
};

raw_ostream &operator<<(raw_ostream &OS, const ILPValue &Val);

} // end namespace llvm

#endif // LLVM_CODEGEN_SCHEDULEDFS_H

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