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usr / src / contrib / llvm-project / llvm / lib / Target / Sparc /

📁 ..
📁 AsmParser
📄 DelaySlotFiller.cpp(14.86 KB)
📁 Disassembler
📄 LeonFeatures.td(2.12 KB)
📄 LeonPasses.cpp(5.78 KB)
📄 LeonPasses.h(2.59 KB)
📁 MCTargetDesc
📄 Sparc.h(5.28 KB)
📄 Sparc.td(7.33 KB)
📄 SparcAsmPrinter.cpp(16.24 KB)
📄 SparcCallingConv.td(5.66 KB)
📄 SparcFrameLowering.cpp(13.77 KB)
📄 SparcFrameLowering.h(2.4 KB)
📄 SparcISelDAGToDAG.cpp(14.22 KB)
📄 SparcISelLowering.cpp(133.64 KB)
📄 SparcISelLowering.h(9.48 KB)
📄 SparcInstr64Bit.td(21.58 KB)
📄 SparcInstrAliases.td(21.18 KB)
📄 SparcInstrFormats.td(10.36 KB)
📄 SparcInstrInfo.cpp(18.87 KB)
📄 SparcInstrInfo.h(4.13 KB)
📄 SparcInstrInfo.td(68.33 KB)
📄 SparcInstrVIS.td(11.1 KB)
📄 SparcMCInstLower.cpp(3.31 KB)
📄 SparcMachineFunctionInfo.cpp(476 B)
📄 SparcMachineFunctionInfo.h(1.92 KB)
📄 SparcRegisterInfo.cpp(8.22 KB)
📄 SparcRegisterInfo.h(1.73 KB)
📄 SparcRegisterInfo.td(13.94 KB)
📄 SparcSchedule.td(6.43 KB)
📄 SparcSubtarget.cpp(3.17 KB)
📄 SparcSubtarget.h(4.08 KB)
📄 SparcTargetMachine.cpp(7.77 KB)
📄 SparcTargetMachine.h(2.78 KB)
📄 SparcTargetObjectFile.cpp(1.85 KB)
📄 SparcTargetObjectFile.h(1.15 KB)
📁 TargetInfo

Editing: SparcRegisterInfo.h

//===-- SparcRegisterInfo.h - Sparc Register Information Impl ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the Sparc implementation of the TargetRegisterInfo class.
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_TARGET_SPARC_SPARCREGISTERINFO_H
#define LLVM_LIB_TARGET_SPARC_SPARCREGISTERINFO_H

#include "llvm/CodeGen/TargetRegisterInfo.h"

#define GET_REGINFO_HEADER
#include "SparcGenRegisterInfo.inc"

namespace llvm {
struct SparcRegisterInfo : public SparcGenRegisterInfo {
  SparcRegisterInfo();

/// Code Generation virtual methods...
  const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
  const uint32_t *getCallPreservedMask(const MachineFunction &MF,
                                       CallingConv::ID CC) const override;

const uint32_t* getRTCallPreservedMask(CallingConv::ID CC) const;

BitVector getReservedRegs(const MachineFunction &MF) const override;

const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
                                                unsigned Kind) const override;

void eliminateFrameIndex(MachineBasicBlock::iterator II,
                           int SPAdj, unsigned FIOperandNum,
                           RegScavenger *RS = nullptr) const override;

bool canRealignStack(const MachineFunction &MF) const override;

};

} // end namespace llvm

#endif

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Editing: SparcRegisterInfo.h

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