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AsmParser
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Disassembler
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MCTargetDesc
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README.txt
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SystemZ.h
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SystemZ.td
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SystemZAsmPrinter.cpp
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SystemZAsmPrinter.h
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SystemZCallingConv.cpp
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SystemZCallingConv.h
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SystemZCallingConv.td
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SystemZConstantPoolValue.cpp
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SystemZConstantPoolValue.h
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SystemZCopyPhysRegs.cpp
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SystemZElimCompare.cpp
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SystemZFeatures.td
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SystemZFrameLowering.cpp
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SystemZFrameLowering.h
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SystemZHazardRecognizer.cpp
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SystemZHazardRecognizer.h
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SystemZISelDAGToDAG.cpp
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SystemZISelLowering.cpp
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SystemZISelLowering.h
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SystemZInstrBuilder.h
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SystemZInstrDFP.td
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SystemZInstrFP.td
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SystemZInstrFormats.td
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SystemZInstrHFP.td
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SystemZInstrInfo.cpp
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SystemZInstrInfo.h
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SystemZInstrInfo.td
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SystemZInstrSystem.td
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SystemZInstrVector.td
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SystemZLDCleanup.cpp
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SystemZLongBranch.cpp
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SystemZMCInstLower.cpp
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SystemZMCInstLower.h
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SystemZMachineFunctionInfo.cpp
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SystemZMachineFunctionInfo.h
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SystemZMachineScheduler.cpp
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SystemZMachineScheduler.h
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SystemZOperands.td
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SystemZOperators.td
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SystemZPatterns.td
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SystemZPostRewrite.cpp
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SystemZProcessors.td
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SystemZRegisterInfo.cpp
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SystemZRegisterInfo.h
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SystemZRegisterInfo.td
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SystemZSchedule.td
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SystemZScheduleZ13.td
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SystemZScheduleZ14.td
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SystemZScheduleZ15.td
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SystemZScheduleZ196.td
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SystemZScheduleZEC12.td
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SystemZSelectionDAGInfo.cpp
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SystemZSelectionDAGInfo.h
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SystemZShortenInst.cpp
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SystemZSubtarget.cpp
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SystemZSubtarget.h
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SystemZTDC.cpp
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SystemZTargetMachine.cpp
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SystemZTargetMachine.h
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SystemZTargetTransformInfo.cpp
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SystemZTargetTransformInfo.h
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TargetInfo
Editing: SystemZCopyPhysRegs.cpp
//===---------- SystemZPhysRegCopy.cpp - Handle phys reg copies -----------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This pass makes sure that a COPY of a physical register will be // implementable after register allocation in copyPhysReg() (this could be // done in EmitInstrWithCustomInserter() instead if COPY instructions would // be passed to it). // //===----------------------------------------------------------------------===// #include "SystemZMachineFunctionInfo.h" #include "SystemZTargetMachine.h" #include "llvm/CodeGen/MachineDominators.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/TargetInstrInfo.h" #include "llvm/CodeGen/TargetRegisterInfo.h" #include "llvm/Target/TargetMachine.h" using namespace llvm; #define SYSTEMZ_COPYPHYSREGS_NAME "SystemZ Copy Physregs" namespace llvm { void initializeSystemZCopyPhysRegsPass(PassRegistry&); } namespace { class SystemZCopyPhysRegs : public MachineFunctionPass { public: static char ID; SystemZCopyPhysRegs() : MachineFunctionPass(ID), TII(nullptr), MRI(nullptr) { initializeSystemZCopyPhysRegsPass(*PassRegistry::getPassRegistry()); } StringRef getPassName() const override { return SYSTEMZ_COPYPHYSREGS_NAME; } bool runOnMachineFunction(MachineFunction &MF) override; void getAnalysisUsage(AnalysisUsage &AU) const override; private: bool visitMBB(MachineBasicBlock &MBB); const SystemZInstrInfo *TII; MachineRegisterInfo *MRI; }; char SystemZCopyPhysRegs::ID = 0; } // end anonymous namespace INITIALIZE_PASS(SystemZCopyPhysRegs, "systemz-copy-physregs", SYSTEMZ_COPYPHYSREGS_NAME, false, false) FunctionPass *llvm::createSystemZCopyPhysRegsPass(SystemZTargetMachine &TM) { return new SystemZCopyPhysRegs(); } void SystemZCopyPhysRegs::getAnalysisUsage(AnalysisUsage &AU) const { AU.setPreservesCFG(); MachineFunctionPass::getAnalysisUsage(AU); } bool SystemZCopyPhysRegs::visitMBB(MachineBasicBlock &MBB) { bool Modified = false; // Certain special registers can only be copied from a subset of the // default register class of the type. It is therefore necessary to create // the target copy instructions before regalloc instead of in copyPhysReg(). for (MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); MBBI != E; ) { MachineInstr *MI = &*MBBI++; if (!MI->isCopy()) continue; DebugLoc DL = MI->getDebugLoc(); Register SrcReg = MI->getOperand(1).getReg(); Register DstReg = MI->getOperand(0).getReg(); if (DstReg.isVirtual() && (SrcReg == SystemZ::CC || SystemZ::AR32BitRegClass.contains(SrcReg))) { Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass); if (SrcReg == SystemZ::CC) BuildMI(MBB, MI, DL, TII->get(SystemZ::IPM), Tmp); else BuildMI(MBB, MI, DL, TII->get(SystemZ::EAR), Tmp).addReg(SrcReg); MI->getOperand(1).setReg(Tmp); Modified = true; } else if (SrcReg.isVirtual() && SystemZ::AR32BitRegClass.contains(DstReg)) { Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass); MI->getOperand(0).setReg(Tmp); BuildMI(MBB, MBBI, DL, TII->get(SystemZ::SAR), DstReg).addReg(Tmp); Modified = true; } } return Modified; } bool SystemZCopyPhysRegs::runOnMachineFunction(MachineFunction &F) { TII = static_cast<const SystemZInstrInfo *>(F.getSubtarget().getInstrInfo()); MRI = &F.getRegInfo(); bool Modified = false; for (auto &MBB : F) Modified |= visitMBB(MBB); return Modified; }
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