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📄 AArch64TargetParser.def(12.01 KB)
📄 AArch64TargetParser.h(4.89 KB)
📄 AMDGPUMetadata.h(17.98 KB)
📄 AMDHSAKernelDescriptor.h(7.63 KB)
📄 ARMAttributeParser.h(3.2 KB)
📄 ARMBuildAttributes.h(8.6 KB)
📄 ARMEHABI.h(3.72 KB)
📄 ARMTargetParser.def(18.94 KB)
📄 ARMTargetParser.h(8.76 KB)
📄 ARMWinEH.h(18.27 KB)
📄 AlignOf.h(1.56 KB)
📄 Alignment.h(12.95 KB)
📄 Allocator.h(16.54 KB)
📄 AllocatorBase.h(3.87 KB)
📄 ArrayRecycler.h(4.78 KB)
📄 Atomic.h(1.09 KB)
📄 AtomicOrdering.h(6.01 KB)
📄 Automaton.h(9.64 KB)
📄 Base64.h(1.84 KB)
📄 BinaryByteStream.h(9.14 KB)
📄 BinaryItemStream.h(3.63 KB)
📄 BinaryStream.h(3.75 KB)
📄 BinaryStreamArray.h(12.46 KB)
📄 BinaryStreamError.h(1.29 KB)
📄 BinaryStreamReader.h(11.01 KB)
📄 BinaryStreamRef.h(10.09 KB)
📄 BinaryStreamWriter.h(7.79 KB)
📄 BlockFrequency.h(2.41 KB)
📄 BranchProbability.h(7.92 KB)
📄 BuryPointer.h(1.03 KB)
📄 CBindingWrapping.h(1.86 KB)
📄 CFGDiff.h(9.95 KB)
📄 CFGUpdate.h(4.12 KB)
📄 COM.h(1004 B)
📄 CRC.h(1.63 KB)
📄 CachePruning.h(3.5 KB)
📄 Capacity.h(972 B)
📄 Casting.h(13.92 KB)
📄 CheckedArithmetic.h(3.71 KB)
📄 Chrono.h(5.78 KB)
📄 CodeGen.h(1.96 KB)
📄 CodeGenCoverage.h(1.18 KB)
📄 CommandLine.h(71.22 KB)
📄 Compiler.h(19.5 KB)
📄 Compression.h(1.39 KB)
📄 ConvertUTF.h(11.4 KB)
📄 CrashRecoveryContext.h(9.26 KB)
📄 DJB.h(1.05 KB)
📄 DOTGraphTraits.h(5.58 KB)
📄 DataExtractor.h(30.28 KB)
📄 DataTypes.h(775 B)
📄 Debug.h(4.7 KB)
📄 DebugCounter.h(7.01 KB)
📄 DynamicLibrary.h(5.77 KB)
📄 ELFAttributeParser.h(2.22 KB)
📄 ELFAttributes.h(1.02 KB)
📄 Endian.h(14.28 KB)
📄 EndianStream.h(1.93 KB)
📄 Errc.h(3.8 KB)
📄 Errno.h(1.45 KB)
📄 Error.h(43.82 KB)
📄 ErrorHandling.h(6.39 KB)
📄 ErrorOr.h(7.48 KB)
📄 ExtensibleRTTI.h(4.02 KB)
📄 FileCheck.h(6.69 KB)
📄 FileCollector.h(3.74 KB)
📄 FileOutputBuffer.h(3.36 KB)
📄 FileSystem.h(53.03 KB)
📄 FileUtilities.h(3.83 KB)
📄 Format.h(9.45 KB)
📄 FormatAdapters.h(3.38 KB)
📄 FormatCommon.h(2.05 KB)
📄 FormatProviders.h(15.27 KB)
📄 FormatVariadic.h(9.88 KB)
📄 FormatVariadicDetails.h(5.3 KB)
📄 FormattedStream.h(6.42 KB)
📄 GenericDomTree.h(30.89 KB)
📄 GenericDomTreeConstruction.h(63.42 KB)
📄 GenericIteratedDominanceFrontier.h(7.31 KB)
📄 GlobPattern.h(1.35 KB)
📄 GraphWriter.h(11.79 KB)
📄 Host.h(2.68 KB)
📄 InitLLVM.h(1.79 KB)
📄 ItaniumManglingCanonicalizer.h(3.17 KB)
📄 JSON.h(28.25 KB)
📄 KnownBits.h(8.35 KB)
📄 LEB128.h(5.74 KB)
📄 LineIterator.h(2.62 KB)
📄 Locale.h(223 B)
📄 LockFileManager.h(3.13 KB)
📄 LowLevelTypeImpl.h(11.94 KB)
📄 MD5.h(3.39 KB)
📄 MSVCErrorWorkarounds.h(2.62 KB)
📄 MachineValueType.h(42.37 KB)
📄 ManagedStatic.h(4.21 KB)
📄 MathExtras.h(32.81 KB)
📄 MemAlloc.h(3.21 KB)
📄 Memory.h(6.94 KB)
📄 MemoryBuffer.h(10.98 KB)
📄 MipsABIFlags.h(3.92 KB)
📄 Mutex.h(2.14 KB)
📄 NativeFormatting.h(1.64 KB)
📄 OnDiskHashTable.h(21.97 KB)
📄 OptimizedStructLayout.h(5.89 KB)
📄 Parallel.h(5.99 KB)
📄 Path.h(15.6 KB)
📄 PluginLoader.h(1.29 KB)
📄 PointerLikeTypeTraits.h(5.69 KB)
📄 PrettyStackTrace.h(4.45 KB)
📄 Printable.h(1.5 KB)
📄 Process.h(9.31 KB)
📄 Program.h(10.35 KB)
📄 RISCVAttributeParser.h(1.15 KB)
📄 RISCVAttributes.h(1.2 KB)
📄 RISCVTargetParser.def(446 B)
📄 RWMutex.h(5.65 KB)
📄 RandomNumberGenerator.h(2.29 KB)
📄 Recycler.h(3.47 KB)
📄 RecyclingAllocator.h(2.38 KB)
📄 Regex.h(4.37 KB)
📄 Registry.h(5.14 KB)
📄 ReverseIteration.h(360 B)
📄 SHA1.h(2.37 KB)
📄 SMLoc.h(1.78 KB)
📄 SMTAPI.h(16.33 KB)
📄 SaveAndRestore.h(1.02 KB)
📄 ScaledNumber.h(30.65 KB)
📄 ScopedPrinter.h(11.39 KB)
📄 Signals.h(5.22 KB)
📄 Signposts.h(1.29 KB)
📄 SmallVectorMemoryBuffer.h(2.28 KB)
📁 Solaris
📄 SourceMgr.h(10.37 KB)
📄 SpecialCaseList.h(6.01 KB)
📄 StringSaver.h(1.94 KB)
📄 SuffixTree.h(13.15 KB)
📄 SwapByteOrder.h(4.8 KB)
📄 SymbolRemappingReader.h(4.36 KB)
📄 SystemUtils.h(1.02 KB)
📄 TarWriter.h(941 B)
📄 TargetOpcodes.def(22.01 KB)
📄 TargetParser.h(4.08 KB)
📄 TargetRegistry.h(46.87 KB)
📄 TargetSelect.h(6.2 KB)
📄 TaskQueue.h(4.24 KB)
📄 ThreadLocal.h(2.08 KB)
📄 ThreadPool.h(3.44 KB)
📄 Threading.h(10.62 KB)
📄 TimeProfiler.h(3.46 KB)
📄 Timer.h(8.93 KB)
📄 ToolOutputFile.h(2.24 KB)
📄 TrailingObjects.h(15.19 KB)
📄 TrigramIndex.h(2.84 KB)
📄 TypeName.h(2.13 KB)
📄 TypeSize.h(8.53 KB)
📄 Unicode.h(2.5 KB)
📄 UnicodeCharRanges.h(3.27 KB)
📄 Valgrind.h(1.16 KB)
📄 VersionTuple.h(5.22 KB)
📄 VirtualFileSystem.h(28.28 KB)
📄 Watchdog.h(1.15 KB)
📄 Win64EH.h(4.82 KB)
📁 Windows
📄 WindowsError.h(541 B)
📄 WithColor.h(4.64 KB)
📄 X86DisassemblerDecoderCommon.h(29.39 KB)
📄 X86TargetParser.def(8.21 KB)
📄 X86TargetParser.h(3.57 KB)
📄 YAMLParser.h(16.29 KB)
📄 YAMLTraits.h(67.62 KB)
📄 circular_raw_ostream.h(4.97 KB)
📄 raw_os_ostream.h(1.29 KB)
📄 raw_ostream.h(20.82 KB)
📄 raw_sha1_ostream.h(1.29 KB)
📄 thread.h(1.33 KB)
📄 type_traits.h(6.75 KB)
📄 xxhash.h(1.92 KB)

Editing: TargetOpcodes.def

//===-- llvm/Support/TargetOpcodes.def - Target Indep Opcodes ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the target independent instruction opcodes.
//
//===----------------------------------------------------------------------===//

// NOTE: NO INCLUDE GUARD DESIRED!

/// HANDLE_TARGET_OPCODE defines an opcode and its associated enum value.
///
#ifndef HANDLE_TARGET_OPCODE
#define HANDLE_TARGET_OPCODE(OPC, NUM)
#endif

/// HANDLE_TARGET_OPCODE_MARKER defines an alternative identifier for an opcode.
///
#ifndef HANDLE_TARGET_OPCODE_MARKER
#define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC)
#endif

/// Every instruction defined here must also appear in Target.td.
///
HANDLE_TARGET_OPCODE(PHI)
HANDLE_TARGET_OPCODE(INLINEASM)
HANDLE_TARGET_OPCODE(INLINEASM_BR)
HANDLE_TARGET_OPCODE(CFI_INSTRUCTION)
HANDLE_TARGET_OPCODE(EH_LABEL)
HANDLE_TARGET_OPCODE(GC_LABEL)
HANDLE_TARGET_OPCODE(ANNOTATION_LABEL)

/// KILL - This instruction is a noop that is used only to adjust the
/// liveness of registers. This can be useful when dealing with
/// sub-registers.
HANDLE_TARGET_OPCODE(KILL)

/// EXTRACT_SUBREG - This instruction takes two operands: a register
/// that has subregisters, and a subregister index. It returns the
/// extracted subregister value. This is commonly used to implement
/// truncation operations on target architectures which support it.
HANDLE_TARGET_OPCODE(EXTRACT_SUBREG)

/// INSERT_SUBREG - This instruction takes three operands: a register that
/// has subregisters, a register providing an insert value, and a
/// subregister index. It returns the value of the first register with the
/// value of the second register inserted. The first register is often
/// defined by an IMPLICIT_DEF, because it is commonly used to implement
/// anyext operations on target architectures which support it.
HANDLE_TARGET_OPCODE(INSERT_SUBREG)

/// IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef.
HANDLE_TARGET_OPCODE(IMPLICIT_DEF)

/// SUBREG_TO_REG - Assert the value of bits in a super register.
/// The result of this instruction is the value of the second operand inserted
/// into the subregister specified by the third operand. All other bits are
/// assumed to be equal to the bits in the immediate integer constant in the
/// first operand. This instruction just communicates information; No code
/// should be generated.
/// This is typically used after an instruction where the write to a subregister
/// implicitly cleared the bits in the super registers.
HANDLE_TARGET_OPCODE(SUBREG_TO_REG)

/// COPY_TO_REGCLASS - This instruction is a placeholder for a plain
/// register-to-register copy into a specific register class. This is only
/// used between instruction selection and MachineInstr creation, before
/// virtual registers have been created for all the instructions, and it's
/// only needed in cases where the register classes implied by the
/// instructions are insufficient. It is emitted as a COPY MachineInstr.
  HANDLE_TARGET_OPCODE(COPY_TO_REGCLASS)

/// DBG_VALUE - a mapping of the llvm.dbg.value intrinsic
HANDLE_TARGET_OPCODE(DBG_VALUE)

/// DBG_LABEL - a mapping of the llvm.dbg.label intrinsic
HANDLE_TARGET_OPCODE(DBG_LABEL)

/// REG_SEQUENCE - This variadic instruction is used to form a register that
/// represents a consecutive sequence of sub-registers. It's used as a
/// register coalescing / allocation aid and must be eliminated before code
/// emission.
// In SDNode form, the first operand encodes the register class created by
// the REG_SEQUENCE, while each subsequent pair names a vreg + subreg index
// pair.  Once it has been lowered to a MachineInstr, the regclass operand
// is no longer present.
/// e.g. v1027 = REG_SEQUENCE v1024, 3, v1025, 4, v1026, 5
/// After register coalescing references of v1024 should be replace with
/// v1027:3, v1025 with v1027:4, etc.
  HANDLE_TARGET_OPCODE(REG_SEQUENCE)

/// COPY - Target-independent register copy. This instruction can also be
/// used to copy between subregisters of virtual registers.
  HANDLE_TARGET_OPCODE(COPY)

/// BUNDLE - This instruction represents an instruction bundle. Instructions
/// which immediately follow a BUNDLE instruction which are marked with
/// 'InsideBundle' flag are inside the bundle.
HANDLE_TARGET_OPCODE(BUNDLE)

/// Lifetime markers.
HANDLE_TARGET_OPCODE(LIFETIME_START)
HANDLE_TARGET_OPCODE(LIFETIME_END)

/// A Stackmap instruction captures the location of live variables at its
/// position in the instruction stream. It is followed by a shadow of bytes
/// that must lie within the function and not contain another stackmap.
HANDLE_TARGET_OPCODE(STACKMAP)

/// FEntry all - This is a marker instruction which gets translated into a raw fentry call.
HANDLE_TARGET_OPCODE(FENTRY_CALL)

/// Patchable call instruction - this instruction represents a call to a
/// constant address, followed by a series of NOPs. It is intended to
/// support optimizations for dynamic languages (such as javascript) that
/// rewrite calls to runtimes with more efficient code sequences.
/// This also implies a stack map.
HANDLE_TARGET_OPCODE(PATCHPOINT)

/// This pseudo-instruction loads the stack guard value. Targets which need
/// to prevent the stack guard value or address from being spilled to the
/// stack should override TargetLowering::emitLoadStackGuardNode and
/// additionally expand this pseudo after register allocation.
HANDLE_TARGET_OPCODE(LOAD_STACK_GUARD)

/// These are used to support call sites that must have the stack adjusted
/// before the call (e.g. to initialize an argument passed by value).
/// See llvm.call.preallocated.{setup,arg} in the LangRef for more details.
HANDLE_TARGET_OPCODE(PREALLOCATED_SETUP)
HANDLE_TARGET_OPCODE(PREALLOCATED_ARG)

/// Call instruction with associated vm state for deoptimization and list
/// of live pointers for relocation by the garbage collector.  It is
/// intended to support garbage collection with fully precise relocating
/// collectors and deoptimizations in either the callee or caller.
HANDLE_TARGET_OPCODE(STATEPOINT)

/// Instruction that records the offset of a local stack allocation passed to
/// llvm.localescape. It has two arguments: the symbol for the label and the
/// frame index of the local stack allocation.
HANDLE_TARGET_OPCODE(LOCAL_ESCAPE)

/// Wraps a machine instruction which can fault, bundled with associated
/// information on how to handle such a fault.
/// For example loading instruction that may page fault, bundled with associated
/// information on how to handle such a page fault.  It is intended to support
/// "zero cost" null checks in managed languages by allowing LLVM to fold
/// comparisons into existing memory operations.
HANDLE_TARGET_OPCODE(FAULTING_OP)

/// Wraps a machine instruction to add patchability constraints.  An
/// instruction wrapped in PATCHABLE_OP has to either have a minimum
/// size or be preceded with a nop of that size.  The first operand is
/// an immediate denoting the minimum size of the instruction, the
/// second operand is an immediate denoting the opcode of the original
/// instruction.  The rest of the operands are the operands of the
/// original instruction.
HANDLE_TARGET_OPCODE(PATCHABLE_OP)

/// This is a marker instruction which gets translated into a nop sled, useful
/// for inserting instrumentation instructions at runtime.
HANDLE_TARGET_OPCODE(PATCHABLE_FUNCTION_ENTER)

/// Wraps a return instruction and its operands to enable adding nop sleds
/// either before or after the return. The nop sleds are useful for inserting
/// instrumentation instructions at runtime.
/// The patch here replaces the return instruction.
HANDLE_TARGET_OPCODE(PATCHABLE_RET)

/// This is a marker instruction which gets translated into a nop sled, useful
/// for inserting instrumentation instructions at runtime.
/// The patch here prepends the return instruction.
/// The same thing as in x86_64 is not possible for ARM because it has multiple
/// return instructions. Furthermore, CPU allows parametrized and even
/// conditional return instructions. In the current ARM implementation we are
/// making use of the fact that currently LLVM doesn't seem to generate
/// conditional return instructions.
/// On ARM, the same instruction can be used for popping multiple registers
/// from the stack and returning (it just pops pc register too), and LLVM
/// generates it sometimes. So we can't insert the sled between this stack
/// adjustment and the return without splitting the original instruction into 2
/// instructions. So on ARM, rather than jumping into the exit trampoline, we
/// call it, it does the tracing, preserves the stack and returns.
HANDLE_TARGET_OPCODE(PATCHABLE_FUNCTION_EXIT)

/// Wraps a tail call instruction and its operands to enable adding nop sleds
/// either before or after the tail exit. We use this as a disambiguation from
/// PATCHABLE_RET which specifically only works for return instructions.
HANDLE_TARGET_OPCODE(PATCHABLE_TAIL_CALL)

/// Wraps a logging call and its arguments with nop sleds. At runtime, this can
/// be patched to insert instrumentation instructions.
HANDLE_TARGET_OPCODE(PATCHABLE_EVENT_CALL)

/// Wraps a typed logging call and its argument with nop sleds. At runtime, this
/// can be patched to insert instrumentation instructions.
HANDLE_TARGET_OPCODE(PATCHABLE_TYPED_EVENT_CALL)

HANDLE_TARGET_OPCODE(ICALL_BRANCH_FUNNEL)

/// The following generic opcodes are not supposed to appear after ISel.
/// This is something we might want to relax, but for now, this is convenient
/// to produce diagnostics.

/// Generic ADD instruction. This is an integer add.
HANDLE_TARGET_OPCODE(G_ADD)
HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_START, G_ADD)

/// Generic SUB instruction. This is an integer sub.
HANDLE_TARGET_OPCODE(G_SUB)

// Generic multiply instruction.
HANDLE_TARGET_OPCODE(G_MUL)

// Generic signed division instruction.
HANDLE_TARGET_OPCODE(G_SDIV)

// Generic unsigned division instruction.
HANDLE_TARGET_OPCODE(G_UDIV)

// Generic signed remainder instruction.
HANDLE_TARGET_OPCODE(G_SREM)

// Generic unsigned remainder instruction.
HANDLE_TARGET_OPCODE(G_UREM)

/// Generic bitwise and instruction.
HANDLE_TARGET_OPCODE(G_AND)

/// Generic bitwise or instruction.
HANDLE_TARGET_OPCODE(G_OR)

/// Generic bitwise exclusive-or instruction.
HANDLE_TARGET_OPCODE(G_XOR)

HANDLE_TARGET_OPCODE(G_IMPLICIT_DEF)

/// Generic PHI instruction with types.
HANDLE_TARGET_OPCODE(G_PHI)

/// Generic instruction to materialize the address of an alloca or other
/// stack-based object.
HANDLE_TARGET_OPCODE(G_FRAME_INDEX)

/// Generic reference to global value.
HANDLE_TARGET_OPCODE(G_GLOBAL_VALUE)

/// Generic instruction to extract blocks of bits from the register given
/// (typically a sub-register COPY after instruction selection).
HANDLE_TARGET_OPCODE(G_EXTRACT)

HANDLE_TARGET_OPCODE(G_UNMERGE_VALUES)

/// Generic instruction to insert blocks of bits from the registers given into
/// the source.
HANDLE_TARGET_OPCODE(G_INSERT)

/// Generic instruction to paste a variable number of components together into a
/// larger register.
HANDLE_TARGET_OPCODE(G_MERGE_VALUES)

/// Generic instruction to create a vector value from a number of scalar
/// components.
HANDLE_TARGET_OPCODE(G_BUILD_VECTOR)

/// Generic instruction to create a vector value from a number of scalar
/// components, which have types larger than the result vector elt type.
HANDLE_TARGET_OPCODE(G_BUILD_VECTOR_TRUNC)

/// Generic instruction to create a vector by concatenating multiple vectors.
HANDLE_TARGET_OPCODE(G_CONCAT_VECTORS)

/// Generic pointer to int conversion.
HANDLE_TARGET_OPCODE(G_PTRTOINT)

/// Generic int to pointer conversion.
HANDLE_TARGET_OPCODE(G_INTTOPTR)

/// Generic bitcast. The source and destination types must be different, or a
/// COPY is the relevant instruction.
HANDLE_TARGET_OPCODE(G_BITCAST)

/// Generic freeze.
HANDLE_TARGET_OPCODE(G_FREEZE)

/// INTRINSIC trunc intrinsic.
HANDLE_TARGET_OPCODE(G_INTRINSIC_TRUNC)

/// INTRINSIC round intrinsic.
HANDLE_TARGET_OPCODE(G_INTRINSIC_ROUND)

/// INTRINSIC readcyclecounter
HANDLE_TARGET_OPCODE(G_READCYCLECOUNTER)

/// Generic load (including anyext load)
HANDLE_TARGET_OPCODE(G_LOAD)

/// Generic signext load
HANDLE_TARGET_OPCODE(G_SEXTLOAD)

/// Generic zeroext load
HANDLE_TARGET_OPCODE(G_ZEXTLOAD)

/// Generic indexed load (including anyext load)
HANDLE_TARGET_OPCODE(G_INDEXED_LOAD)

/// Generic indexed signext load
HANDLE_TARGET_OPCODE(G_INDEXED_SEXTLOAD)

/// Generic indexed zeroext load
HANDLE_TARGET_OPCODE(G_INDEXED_ZEXTLOAD)

/// Generic store.
HANDLE_TARGET_OPCODE(G_STORE)

/// Generic indexed store.
HANDLE_TARGET_OPCODE(G_INDEXED_STORE)

/// Generic atomic cmpxchg with internal success check.
HANDLE_TARGET_OPCODE(G_ATOMIC_CMPXCHG_WITH_SUCCESS)

/// Generic atomic cmpxchg.
HANDLE_TARGET_OPCODE(G_ATOMIC_CMPXCHG)

/// Generic atomicrmw.
HANDLE_TARGET_OPCODE(G_ATOMICRMW_XCHG)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_ADD)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_SUB)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_AND)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_NAND)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_OR)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_XOR)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_MAX)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_MIN)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_UMAX)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_UMIN)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_FADD)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_FSUB)

// Generic atomic fence
HANDLE_TARGET_OPCODE(G_FENCE)

/// Generic conditional branch instruction.
HANDLE_TARGET_OPCODE(G_BRCOND)

/// Generic indirect branch instruction.
HANDLE_TARGET_OPCODE(G_BRINDIRECT)

/// Generic intrinsic use (without side effects).
HANDLE_TARGET_OPCODE(G_INTRINSIC)

/// Generic intrinsic use (with side effects).
HANDLE_TARGET_OPCODE(G_INTRINSIC_W_SIDE_EFFECTS)

/// Generic extension allowing rubbish in high bits.
HANDLE_TARGET_OPCODE(G_ANYEXT)

/// Generic instruction to discard the high bits of a register. This differs
/// from (G_EXTRACT val, 0) on its action on vectors: G_TRUNC will truncate
/// each element individually, G_EXTRACT will typically discard the high
/// elements of the vector.
HANDLE_TARGET_OPCODE(G_TRUNC)

/// Generic integer constant.
HANDLE_TARGET_OPCODE(G_CONSTANT)

/// Generic floating constant.
HANDLE_TARGET_OPCODE(G_FCONSTANT)

/// Generic va_start instruction. Stores to its one pointer operand.
HANDLE_TARGET_OPCODE(G_VASTART)

/// Generic va_start instruction. Stores to its one pointer operand.
HANDLE_TARGET_OPCODE(G_VAARG)

// Generic sign extend
HANDLE_TARGET_OPCODE(G_SEXT)
HANDLE_TARGET_OPCODE(G_SEXT_INREG)

// Generic zero extend
HANDLE_TARGET_OPCODE(G_ZEXT)

// Generic left-shift
HANDLE_TARGET_OPCODE(G_SHL)

// Generic logical right-shift
HANDLE_TARGET_OPCODE(G_LSHR)

// Generic arithmetic right-shift
HANDLE_TARGET_OPCODE(G_ASHR)

// Generic funnel left shift
HANDLE_TARGET_OPCODE(G_FSHL)

// Generic funnel right shift
HANDLE_TARGET_OPCODE(G_FSHR)

/// Generic integer-base comparison, also applicable to vectors of integers.
HANDLE_TARGET_OPCODE(G_ICMP)

/// Generic floating-point comparison, also applicable to vectors.
HANDLE_TARGET_OPCODE(G_FCMP)

/// Generic select.
HANDLE_TARGET_OPCODE(G_SELECT)

/// Generic unsigned add instruction, consuming the normal operands and
/// producing the result and a carry flag.
HANDLE_TARGET_OPCODE(G_UADDO)

/// Generic unsigned add instruction, consuming the normal operands plus a carry
/// flag, and similarly producing the result and a carry flag.
HANDLE_TARGET_OPCODE(G_UADDE)

/// Generic unsigned sub instruction, consuming the normal operands and
/// producing the result and a carry flag.
HANDLE_TARGET_OPCODE(G_USUBO)

/// Generic unsigned subtract instruction, consuming the normal operands plus a
/// carry flag, and similarly producing the result and a carry flag.
HANDLE_TARGET_OPCODE(G_USUBE)

/// Generic signed add instruction, producing the result and a signed overflow
/// flag.
HANDLE_TARGET_OPCODE(G_SADDO)

/// Generic signed add instruction, consuming the normal operands plus a carry
/// flag, and similarly producing the result and a carry flag.
HANDLE_TARGET_OPCODE(G_SADDE)

/// Generic signed subtract instruction, producing the result and a signed
/// overflow flag.
HANDLE_TARGET_OPCODE(G_SSUBO)

/// Generic signed sub instruction, consuming the normal operands plus a carry
/// flag, and similarly producing the result and a carry flag.
HANDLE_TARGET_OPCODE(G_SSUBE)

/// Generic unsigned multiply instruction, producing the result and a signed
/// overflow flag.
HANDLE_TARGET_OPCODE(G_UMULO)

/// Generic signed multiply instruction, producing the result and a signed
/// overflow flag.
HANDLE_TARGET_OPCODE(G_SMULO)

// Multiply two numbers at twice the incoming bit width (unsigned) and return
// the high half of the result.
HANDLE_TARGET_OPCODE(G_UMULH)

// Multiply two numbers at twice the incoming bit width (signed) and return
// the high half of the result.
HANDLE_TARGET_OPCODE(G_SMULH)

/// Generic saturating unsigned addition.
HANDLE_TARGET_OPCODE(G_UADDSAT)

/// Generic saturating signed addition.
HANDLE_TARGET_OPCODE(G_SADDSAT)

/// Generic saturating unsigned subtraction.
HANDLE_TARGET_OPCODE(G_USUBSAT)

/// Generic saturating signed subtraction.
HANDLE_TARGET_OPCODE(G_SSUBSAT)

/// Generic FP addition.
HANDLE_TARGET_OPCODE(G_FADD)

/// Generic FP subtraction.
HANDLE_TARGET_OPCODE(G_FSUB)

/// Generic FP multiplication.
HANDLE_TARGET_OPCODE(G_FMUL)

/// Generic FMA multiplication. Behaves like llvm fma intrinsic
HANDLE_TARGET_OPCODE(G_FMA)

/// Generic FP multiply and add. Behaves as separate fmul and fadd.
HANDLE_TARGET_OPCODE(G_FMAD)

/// Generic FP division.
HANDLE_TARGET_OPCODE(G_FDIV)

/// Generic FP remainder.
HANDLE_TARGET_OPCODE(G_FREM)

/// Generic FP exponentiation.
HANDLE_TARGET_OPCODE(G_FPOW)

/// Generic base-e exponential of a value.
HANDLE_TARGET_OPCODE(G_FEXP)

/// Generic base-2 exponential of a value.
HANDLE_TARGET_OPCODE(G_FEXP2)

/// Floating point base-e logarithm of a value.
HANDLE_TARGET_OPCODE(G_FLOG)

/// Floating point base-2 logarithm of a value.
HANDLE_TARGET_OPCODE(G_FLOG2)

/// Floating point base-10 logarithm of a value.
HANDLE_TARGET_OPCODE(G_FLOG10)

/// Generic FP negation.
HANDLE_TARGET_OPCODE(G_FNEG)

/// Generic FP extension.
HANDLE_TARGET_OPCODE(G_FPEXT)

/// Generic float to signed-int conversion
HANDLE_TARGET_OPCODE(G_FPTRUNC)

/// Generic float to signed-int conversion
HANDLE_TARGET_OPCODE(G_FPTOSI)

/// Generic float to unsigned-int conversion
HANDLE_TARGET_OPCODE(G_FPTOUI)

/// Generic signed-int to float conversion
HANDLE_TARGET_OPCODE(G_SITOFP)

/// Generic unsigned-int to float conversion
HANDLE_TARGET_OPCODE(G_UITOFP)

/// Generic FP absolute value.
HANDLE_TARGET_OPCODE(G_FABS)

/// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.  NOTE: This does
/// not require that X and Y have the same type, just that they are both
/// floating point. X and the result must have the same type.  FCOPYSIGN(f32,
/// f64) is allowed.
HANDLE_TARGET_OPCODE(G_FCOPYSIGN)

/// Generic FP canonicalize value.
HANDLE_TARGET_OPCODE(G_FCANONICALIZE)

/// FP min/max matching libm's fmin/fmax
HANDLE_TARGET_OPCODE(G_FMINNUM)
HANDLE_TARGET_OPCODE(G_FMAXNUM)

/// FP min/max matching IEEE-754 2008's minnum/maxnum semantics.
HANDLE_TARGET_OPCODE(G_FMINNUM_IEEE)
HANDLE_TARGET_OPCODE(G_FMAXNUM_IEEE)

/// FP min/max matching IEEE-754 2018 draft semantics.
HANDLE_TARGET_OPCODE(G_FMINIMUM)
HANDLE_TARGET_OPCODE(G_FMAXIMUM)

/// Generic pointer offset
HANDLE_TARGET_OPCODE(G_PTR_ADD)

/// Clear the specified bits in a pointer.
HANDLE_TARGET_OPCODE(G_PTRMASK)

/// Generic signed integer minimum.
HANDLE_TARGET_OPCODE(G_SMIN)

/// Generic signed integer maximum.
HANDLE_TARGET_OPCODE(G_SMAX)

/// Generic unsigned integer maximum.
HANDLE_TARGET_OPCODE(G_UMIN)

/// Generic unsigned integer maximum.
HANDLE_TARGET_OPCODE(G_UMAX)

/// Generic BRANCH instruction. This is an unconditional branch.
HANDLE_TARGET_OPCODE(G_BR)

/// Generic branch to jump table entry.
HANDLE_TARGET_OPCODE(G_BRJT)

/// Generic insertelement.
HANDLE_TARGET_OPCODE(G_INSERT_VECTOR_ELT)

/// Generic extractelement.
HANDLE_TARGET_OPCODE(G_EXTRACT_VECTOR_ELT)

/// Generic shufflevector.
HANDLE_TARGET_OPCODE(G_SHUFFLE_VECTOR)

/// Generic count trailing zeroes.
HANDLE_TARGET_OPCODE(G_CTTZ)

/// Same as above, undefined for zero inputs.
HANDLE_TARGET_OPCODE(G_CTTZ_ZERO_UNDEF)

/// Generic count leading zeroes.
HANDLE_TARGET_OPCODE(G_CTLZ)

/// Same as above, undefined for zero inputs.
HANDLE_TARGET_OPCODE(G_CTLZ_ZERO_UNDEF)

/// Generic count bits.
HANDLE_TARGET_OPCODE(G_CTPOP)

/// Generic byte swap.
HANDLE_TARGET_OPCODE(G_BSWAP)

/// Generic bit reverse.
HANDLE_TARGET_OPCODE(G_BITREVERSE)

/// Floating point ceil.
HANDLE_TARGET_OPCODE(G_FCEIL)

/// Floating point cosine.
HANDLE_TARGET_OPCODE(G_FCOS)

/// Floating point sine.
HANDLE_TARGET_OPCODE(G_FSIN)

/// Floating point square root.
HANDLE_TARGET_OPCODE(G_FSQRT)

/// Floating point floor.
HANDLE_TARGET_OPCODE(G_FFLOOR)

/// Floating point round to next integer.
HANDLE_TARGET_OPCODE(G_FRINT)

/// Floating point round to nearest integer.
HANDLE_TARGET_OPCODE(G_FNEARBYINT)

/// Generic AddressSpaceCast.
HANDLE_TARGET_OPCODE(G_ADDRSPACE_CAST)

/// Generic block address
HANDLE_TARGET_OPCODE(G_BLOCK_ADDR)

/// Generic jump table address
HANDLE_TARGET_OPCODE(G_JUMP_TABLE)

/// Generic dynamic stack allocation.
HANDLE_TARGET_OPCODE(G_DYN_STACKALLOC)

/// Strict floating point instructions.
HANDLE_TARGET_OPCODE(G_STRICT_FADD)
HANDLE_TARGET_OPCODE(G_STRICT_FSUB)
HANDLE_TARGET_OPCODE(G_STRICT_FMUL)
HANDLE_TARGET_OPCODE(G_STRICT_FDIV)
HANDLE_TARGET_OPCODE(G_STRICT_FREM)
HANDLE_TARGET_OPCODE(G_STRICT_FMA)
HANDLE_TARGET_OPCODE(G_STRICT_FSQRT)

/// read_register intrinsic
HANDLE_TARGET_OPCODE(G_READ_REGISTER)

/// write_register intrinsic
HANDLE_TARGET_OPCODE(G_WRITE_REGISTER)

/// Marker for the end of the generic opcode.
/// This is used to check if an opcode is in the range of the
/// generic opcodes.
HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_END, G_WRITE_REGISTER)

/// BUILTIN_OP_END - This must be the last enum value in this list.
/// The target-specific post-isel opcode values start here.
HANDLE_TARGET_OPCODE_MARKER(GENERIC_OP_END, PRE_ISEL_GENERIC_OPCODE_END)

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