003 File Manager
Current Path:
/usr/src/contrib/llvm-project/llvm/lib/Target/VE
usr
/
src
/
contrib
/
llvm-project
/
llvm
/
lib
/
Target
/
VE
/
📁
..
📁
AsmParser
📁
Disassembler
📁
MCTargetDesc
📁
TargetInfo
📄
VE.h
(8.79 KB)
📄
VE.td
(2.21 KB)
📄
VEAsmPrinter.cpp
(12.54 KB)
📄
VECallingConv.td
(3.05 KB)
📄
VEFrameLowering.cpp
(13.39 KB)
📄
VEFrameLowering.h
(3.35 KB)
📄
VEISelDAGToDAG.cpp
(10.27 KB)
📄
VEISelLowering.cpp
(37.14 KB)
📄
VEISelLowering.h
(4.23 KB)
📄
VEInstrFormats.td
(5.53 KB)
📄
VEInstrInfo.cpp
(20.02 KB)
📄
VEInstrInfo.h
(3.35 KB)
📄
VEInstrInfo.td
(80.08 KB)
📄
VEMCInstLower.cpp
(2.83 KB)
📄
VEMachineFunctionInfo.cpp
(469 B)
📄
VEMachineFunctionInfo.h
(1.57 KB)
📄
VERegisterInfo.cpp
(5.07 KB)
📄
VERegisterInfo.h
(1.75 KB)
📄
VERegisterInfo.td
(5.67 KB)
📄
VESubtarget.cpp
(4.04 KB)
📄
VESubtarget.h
(2.38 KB)
📄
VETargetMachine.cpp
(3.23 KB)
📄
VETargetMachine.h
(1.95 KB)
📄
VETargetTransformInfo.h
(1.72 KB)
Editing: VETargetMachine.cpp
//===-- VETargetMachine.cpp - Define TargetMachine for VE -----------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // //===----------------------------------------------------------------------===// #include "VETargetMachine.h" #include "TargetInfo/VETargetInfo.h" #include "VE.h" #include "VETargetTransformInfo.h" #include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" #include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/IR/LegacyPassManager.h" #include "llvm/Support/TargetRegistry.h" using namespace llvm; #define DEBUG_TYPE "ve" extern "C" void LLVMInitializeVETarget() { // Register the target. RegisterTargetMachine<VETargetMachine> X(getTheVETarget()); } static std::string computeDataLayout(const Triple &T) { // Aurora VE is little endian std::string Ret = "e"; // Use ELF mangling Ret += "-m:e"; // Alignments for 64 bit integers. Ret += "-i64:64"; // VE supports 32 bit and 64 bits integer on registers Ret += "-n32:64"; // Stack alignment is 128 bits Ret += "-S128"; return Ret; } static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) { if (!RM.hasValue()) return Reloc::Static; return *RM; } class VEELFTargetObjectFile : public TargetLoweringObjectFileELF { void Initialize(MCContext &Ctx, const TargetMachine &TM) override { TargetLoweringObjectFileELF::Initialize(Ctx, TM); InitializeELF(TM.Options.UseInitArray); } }; static std::unique_ptr<TargetLoweringObjectFile> createTLOF() { return std::make_unique<VEELFTargetObjectFile>(); } /// Create an Aurora VE architecture model VETargetMachine::VETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, getEffectiveRelocModel(RM), getEffectiveCodeModel(CM, CodeModel::Small), OL), TLOF(createTLOF()), Subtarget(TT, std::string(CPU), std::string(FS), *this) { initAsmInfo(); } VETargetMachine::~VETargetMachine() {} TargetTransformInfo VETargetMachine::getTargetTransformInfo(const Function &F) { return TargetTransformInfo(VETTIImpl(this, F)); } namespace { /// VE Code Generator Pass Configuration Options. class VEPassConfig : public TargetPassConfig { public: VEPassConfig(VETargetMachine &TM, PassManagerBase &PM) : TargetPassConfig(TM, PM) {} VETargetMachine &getVETargetMachine() const { return getTM<VETargetMachine>(); } bool addInstSelector() override; }; } // namespace TargetPassConfig *VETargetMachine::createPassConfig(PassManagerBase &PM) { return new VEPassConfig(*this, PM); } bool VEPassConfig::addInstSelector() { addPass(createVEISelDag(getVETargetMachine())); return false; }
Upload File
Create Folder