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AArch64.cpp
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AArch64.h
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AMDGPU.cpp
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AMDGPU.h
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ARC.cpp
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ARC.h
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ARM.cpp
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ARM.h
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AVR.cpp
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AVR.h
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BPF.cpp
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BPF.h
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Hexagon.cpp
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Hexagon.h
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Lanai.cpp
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Lanai.h
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Le64.cpp
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Le64.h
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MSP430.cpp
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MSP430.h
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Mips.cpp
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Mips.h
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NVPTX.cpp
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NVPTX.h
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OSTargets.cpp
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OSTargets.h
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PNaCl.cpp
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PNaCl.h
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PPC.cpp
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PPC.h
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RISCV.cpp
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RISCV.h
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SPIR.cpp
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SPIR.h
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Sparc.cpp
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Sparc.h
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SystemZ.cpp
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SystemZ.h
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TCE.cpp
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TCE.h
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VE.cpp
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VE.h
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WebAssembly.cpp
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WebAssembly.h
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X86.cpp
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X86.h
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XCore.cpp
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XCore.h
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Editing: WebAssembly.h
//=== WebAssembly.h - Declare WebAssembly target feature support *- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file declares WebAssembly TargetInfo objects. // //===----------------------------------------------------------------------===// #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_WEBASSEMBLY_H #define LLVM_CLANG_LIB_BASIC_TARGETS_WEBASSEMBLY_H #include "clang/Basic/TargetInfo.h" #include "clang/Basic/TargetOptions.h" #include "llvm/ADT/Triple.h" #include "llvm/Support/Compiler.h" namespace clang { namespace targets { class LLVM_LIBRARY_VISIBILITY WebAssemblyTargetInfo : public TargetInfo { static const Builtin::Info BuiltinInfo[]; enum SIMDEnum { NoSIMD, SIMD128, UnimplementedSIMD128, } SIMDLevel = NoSIMD; bool HasNontrappingFPToInt = false; bool HasSignExt = false; bool HasExceptionHandling = false; bool HasBulkMemory = false; bool HasAtomics = false; bool HasMutableGlobals = false; bool HasMultivalue = false; bool HasTailCall = false; bool HasReferenceTypes = false; std::string ABI; public: explicit WebAssemblyTargetInfo(const llvm::Triple &T, const TargetOptions &) : TargetInfo(T) { NoAsmVariants = true; SuitableAlign = 128; LargeArrayMinWidth = 128; LargeArrayAlign = 128; SimdDefaultAlign = 128; SigAtomicType = SignedLong; LongDoubleWidth = LongDoubleAlign = 128; LongDoubleFormat = &llvm::APFloat::IEEEquad(); MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; // size_t being unsigned long for both wasm32 and wasm64 makes mangled names // more consistent between the two. SizeType = UnsignedLong; PtrDiffType = SignedLong; IntPtrType = SignedLong; } StringRef getABI() const override; bool setABI(const std::string &Name) override; protected: void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override; private: static void setSIMDLevel(llvm::StringMap<bool> &Features, SIMDEnum Level, bool Enabled); bool initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector<std::string> &FeaturesVec) const override; bool hasFeature(StringRef Feature) const final; void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name, bool Enabled) const final; bool handleTargetFeatures(std::vector<std::string> &Features, DiagnosticsEngine &Diags) final; bool isValidCPUName(StringRef Name) const final; void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const final; bool setCPU(const std::string &Name) final { return isValidCPUName(Name); } ArrayRef<Builtin::Info> getTargetBuiltins() const final; BuiltinVaListKind getBuiltinVaListKind() const final { return VoidPtrBuiltinVaList; } ArrayRef<const char *> getGCCRegNames() const final { return None; } ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const final { return None; } bool validateAsmConstraint(const char *&Name, TargetInfo::ConstraintInfo &Info) const final { return false; } const char *getClobbers() const final { return ""; } bool isCLZForZeroUndef() const final { return false; } bool hasInt128Type() const final { return true; } IntType getIntTypeByWidth(unsigned BitWidth, bool IsSigned) const final { // WebAssembly prefers long long for explicitly 64-bit integers. return BitWidth == 64 ? (IsSigned ? SignedLongLong : UnsignedLongLong) : TargetInfo::getIntTypeByWidth(BitWidth, IsSigned); } IntType getLeastIntTypeByWidth(unsigned BitWidth, bool IsSigned) const final { // WebAssembly uses long long for int_least64_t and int_fast64_t. return BitWidth == 64 ? (IsSigned ? SignedLongLong : UnsignedLongLong) : TargetInfo::getLeastIntTypeByWidth(BitWidth, IsSigned); } CallingConvCheckResult checkCallingConvention(CallingConv CC) const override { switch (CC) { case CC_C: case CC_Swift: return CCCR_OK; default: return CCCR_Warning; } } bool hasExtIntType() const override { return true; } bool hasProtectedVisibility() const override { return false; } }; class LLVM_LIBRARY_VISIBILITY WebAssembly32TargetInfo : public WebAssemblyTargetInfo { public: explicit WebAssembly32TargetInfo(const llvm::Triple &T, const TargetOptions &Opts) : WebAssemblyTargetInfo(T, Opts) { resetDataLayout("e-m:e-p:32:32-i64:64-n32:64-S128"); } protected: void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override; }; class LLVM_LIBRARY_VISIBILITY WebAssembly64TargetInfo : public WebAssemblyTargetInfo { public: explicit WebAssembly64TargetInfo(const llvm::Triple &T, const TargetOptions &Opts) : WebAssemblyTargetInfo(T, Opts) { LongAlign = LongWidth = 64; PointerAlign = PointerWidth = 64; SizeType = UnsignedLong; PtrDiffType = SignedLong; IntPtrType = SignedLong; resetDataLayout("e-m:e-p:64:64-i64:64-n32:64-S128"); } protected: void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override; }; } // namespace targets } // namespace clang #endif // LLVM_CLANG_LIB_BASIC_TARGETS_WEBASSEMBLY_H
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