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Current Path: /usr/src/contrib/llvm-project/llvm/lib/Target/WebAssembly

usr / src / contrib / llvm-project / llvm / lib / Target / WebAssembly /

📁 ..
📁 AsmParser
📁 Disassembler
📁 MCTargetDesc
📄 README.txt(8.34 KB)
📁 TargetInfo
📄 WebAssembly.h(4.05 KB)
📄 WebAssembly.td(4.85 KB)
📄 WebAssemblyAddMissingPrototypes.cpp(5.41 KB)
📄 WebAssemblyArgumentMove.cpp(3.36 KB)
📄 WebAssemblyAsmPrinter.cpp(16.09 KB)
📄 WebAssemblyAsmPrinter.h(3.12 KB)
📄 WebAssemblyCFGSort.cpp(15.94 KB)
📄 WebAssemblyCFGStackify.cpp(55.56 KB)
📄 WebAssemblyDebugFixup.cpp(5.4 KB)
📄 WebAssemblyDebugValueManager.cpp(1.77 KB)
📄 WebAssemblyDebugValueManager.h(1.13 KB)
📄 WebAssemblyExceptionInfo.cpp(6.23 KB)
📄 WebAssemblyExceptionInfo.h(6.24 KB)
📄 WebAssemblyExplicitLocals.cpp(15.04 KB)
📄 WebAssemblyFastISel.cpp(40.39 KB)
📄 WebAssemblyFixBrTableDefaults.cpp(5.81 KB)
📄 WebAssemblyFixFunctionBitcasts.cpp(12.59 KB)
📄 WebAssemblyFixIrreducibleControlFlow.cpp(18.91 KB)
📄 WebAssemblyFrameLowering.cpp(12.68 KB)
📄 WebAssemblyFrameLowering.h(2.98 KB)
📄 WebAssemblyISD.def(1.17 KB)
📄 WebAssemblyISelDAGToDAG.cpp(9.08 KB)
📄 WebAssemblyISelLowering.cpp(68.59 KB)
📄 WebAssemblyISelLowering.h(5.85 KB)
📄 WebAssemblyInstrAtomics.td(48.5 KB)
📄 WebAssemblyInstrBulkMemory.td(2.84 KB)
📄 WebAssemblyInstrCall.td(3.21 KB)
📄 WebAssemblyInstrControl.td(7.93 KB)
📄 WebAssemblyInstrConv.td(14.1 KB)
📄 WebAssemblyInstrFloat.td(6.03 KB)
📄 WebAssemblyInstrFormats.td(3.1 KB)
📄 WebAssemblyInstrInfo.cpp(8.21 KB)
📄 WebAssemblyInstrInfo.h(2.63 KB)
📄 WebAssemblyInstrInfo.td(14.37 KB)
📄 WebAssemblyInstrInteger.td(6.05 KB)
📄 WebAssemblyInstrMemory.td(18.63 KB)
📄 WebAssemblyInstrRef.td(1.15 KB)
📄 WebAssemblyInstrSIMD.td(39.08 KB)
📄 WebAssemblyLateEHPrepare.cpp(14.57 KB)
📄 WebAssemblyLowerBrUnless.cpp(6.21 KB)
📄 WebAssemblyLowerEmscriptenEHSjLj.cpp(45.45 KB)
📄 WebAssemblyLowerGlobalDtors.cpp(7.79 KB)
📄 WebAssemblyMCInstLower.cpp(13.72 KB)
📄 WebAssemblyMCInstLower.h(1.63 KB)
📄 WebAssemblyMachineFunctionInfo.cpp(4.29 KB)
📄 WebAssemblyMachineFunctionInfo.h(6.75 KB)
📄 WebAssemblyMemIntrinsicResults.cpp(7.39 KB)
📄 WebAssemblyOptimizeLiveIntervals.cpp(4.61 KB)
📄 WebAssemblyOptimizeReturned.cpp(2.46 KB)
📄 WebAssemblyPeephole.cpp(6.33 KB)
📄 WebAssemblyPrepareForLiveIntervals.cpp(4.34 KB)
📄 WebAssemblyRegColoring.cpp(6.37 KB)
📄 WebAssemblyRegNumbering.cpp(3.86 KB)
📄 WebAssemblyRegStackify.cpp(38.22 KB)
📄 WebAssemblyRegisterInfo.cpp(6.21 KB)
📄 WebAssemblyRegisterInfo.h(1.74 KB)
📄 WebAssemblyRegisterInfo.td(2.83 KB)
📄 WebAssemblyReplacePhysRegs.cpp(3.89 KB)
📄 WebAssemblyRuntimeLibcallSignatures.cpp(33.82 KB)
📄 WebAssemblyRuntimeLibcallSignatures.h(1.37 KB)
📄 WebAssemblySelectionDAGInfo.cpp(2.57 KB)
📄 WebAssemblySelectionDAGInfo.h(1.94 KB)
📄 WebAssemblySetP2AlignOperands.cpp(3.32 KB)
📄 WebAssemblySubtarget.cpp(2.18 KB)
📄 WebAssemblySubtarget.h(3.88 KB)
📄 WebAssemblyTargetMachine.cpp(18.85 KB)
📄 WebAssemblyTargetMachine.h(2.29 KB)
📄 WebAssemblyTargetObjectFile.cpp(886 B)
📄 WebAssemblyTargetObjectFile.h(959 B)
📄 WebAssemblyTargetTransformInfo.cpp(2.9 KB)
📄 WebAssemblyTargetTransformInfo.h(2.5 KB)
📄 WebAssemblyUtilities.cpp(3.43 KB)
📄 WebAssemblyUtilities.h(1.8 KB)
📄 known_gcc_test_failures.txt(2.07 KB)

Editing: WebAssemblyInstrFormats.td

//=- WebAssemblyInstrFormats.td - WebAssembly Instr. Formats -*- tablegen -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// WebAssembly instruction format definitions.
///
//===----------------------------------------------------------------------===//

// WebAssembly Instruction Format.
// We instantiate 2 of these for every actual instruction (register based
// and stack based), see below.
class WebAssemblyInst<bits<32> inst, string asmstr, string stack, string is64>
  : StackRel, Wasm64Rel, Instruction {
  bits<32> Inst = inst; // Instruction encoding.
  string StackBased = stack;
  string BaseName = NAME;
  string IsWasm64 = is64;
  string Wasm32Name = !subst("_A64", "_A32", NAME);
  let Namespace   = "WebAssembly";
  let Pattern     = [];
  let AsmString   = asmstr;
  // When there are multiple instructions that map to the same encoding (in
  // e.g. the disassembler use case) prefer the one where IsCanonical == 1.
  bit IsCanonical = 0;
}

// Normal instructions. Default instantiation of a WebAssemblyInst.
class NI<dag oops, dag iops, list<dag> pattern, string stack,
         string asmstr = "", bits<32> inst = -1, string is64 = "false">
    : WebAssemblyInst<inst, asmstr, stack, is64> {
  dag OutOperandList = oops;
  dag InOperandList  = iops;
  let Pattern        = pattern;
  let Defs           = [ARGUMENTS];
}

// Generates both register and stack based versions of one actual instruction.
// We have 2 sets of operands (oops & iops) for the register and stack
// based version of this instruction, as well as the corresponding asmstr.
// The register versions have virtual-register operands which correspond to wasm
// locals or stack locations. Each use and def of the register corresponds to an
// implicit local.get / local.set or access of stack operands in wasm. These
// instructions are used for ISel and all MI passes. The stack versions of the
// instructions do not have register operands (they implicitly operate on the
// stack), and local.gets and local.sets are explicit. The register instructions
// are converted to their corresponding stack instructions before lowering to
// MC.
// Every instruction should want to be based on this multi-class to guarantee
// there is always an equivalent pair of instructions.
multiclass I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
             list<dag> pattern_r, string asmstr_r = "", string asmstr_s = "",
             bits<32> inst = -1, string is64 = "false"> {
  let isCodeGenOnly = 1 in
  def "" : NI<oops_r, iops_r, pattern_r, "false", asmstr_r, inst, is64>;
  let BaseName = NAME in
  def _S : NI<oops_s, iops_s, [], "true", asmstr_s, inst, is64>;
}

// For instructions that have no register ops, so both sets are the same.
multiclass NRI<dag oops, dag iops, list<dag> pattern, string asmstr = "",
               bits<32> inst = -1> {
  defm "": I<oops, iops, oops, iops, pattern, asmstr, asmstr, inst>;
}

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Editing: WebAssemblyInstrFormats.td

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