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AsmParser
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Disassembler
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MCTargetDesc
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README.txt
(8.34 KB)
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TargetInfo
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WebAssembly.h
(4.05 KB)
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WebAssembly.td
(4.85 KB)
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WebAssemblyAddMissingPrototypes.cpp
(5.41 KB)
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WebAssemblyArgumentMove.cpp
(3.36 KB)
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WebAssemblyAsmPrinter.cpp
(16.09 KB)
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WebAssemblyAsmPrinter.h
(3.12 KB)
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WebAssemblyCFGSort.cpp
(15.94 KB)
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WebAssemblyCFGStackify.cpp
(55.56 KB)
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WebAssemblyDebugFixup.cpp
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WebAssemblyDebugValueManager.cpp
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WebAssemblyDebugValueManager.h
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WebAssemblyExceptionInfo.cpp
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WebAssemblyExceptionInfo.h
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WebAssemblyExplicitLocals.cpp
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WebAssemblyFastISel.cpp
(40.39 KB)
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WebAssemblyFixBrTableDefaults.cpp
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WebAssemblyFixFunctionBitcasts.cpp
(12.59 KB)
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WebAssemblyFixIrreducibleControlFlow.cpp
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WebAssemblyFrameLowering.cpp
(12.68 KB)
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WebAssemblyFrameLowering.h
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WebAssemblyISD.def
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WebAssemblyISelDAGToDAG.cpp
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WebAssemblyISelLowering.cpp
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WebAssemblyISelLowering.h
(5.85 KB)
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WebAssemblyInstrAtomics.td
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WebAssemblyInstrBulkMemory.td
(2.84 KB)
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WebAssemblyInstrCall.td
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WebAssemblyInstrControl.td
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WebAssemblyInstrConv.td
(14.1 KB)
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WebAssemblyInstrFloat.td
(6.03 KB)
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WebAssemblyInstrFormats.td
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WebAssemblyInstrInfo.cpp
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WebAssemblyInstrInfo.h
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WebAssemblyInstrInfo.td
(14.37 KB)
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WebAssemblyInstrInteger.td
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WebAssemblyInstrMemory.td
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WebAssemblyInstrRef.td
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WebAssemblyInstrSIMD.td
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WebAssemblyLateEHPrepare.cpp
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WebAssemblyLowerBrUnless.cpp
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WebAssemblyLowerEmscriptenEHSjLj.cpp
(45.45 KB)
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WebAssemblyLowerGlobalDtors.cpp
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WebAssemblyMCInstLower.cpp
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WebAssemblyMCInstLower.h
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WebAssemblyMachineFunctionInfo.cpp
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WebAssemblyMachineFunctionInfo.h
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WebAssemblyMemIntrinsicResults.cpp
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WebAssemblyOptimizeLiveIntervals.cpp
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WebAssemblyOptimizeReturned.cpp
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WebAssemblyPeephole.cpp
(6.33 KB)
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WebAssemblyPrepareForLiveIntervals.cpp
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WebAssemblyRegColoring.cpp
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WebAssemblyRegNumbering.cpp
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WebAssemblyRegStackify.cpp
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WebAssemblyRegisterInfo.cpp
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WebAssemblyRegisterInfo.h
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WebAssemblyRegisterInfo.td
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WebAssemblyReplacePhysRegs.cpp
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WebAssemblyRuntimeLibcallSignatures.cpp
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WebAssemblyRuntimeLibcallSignatures.h
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WebAssemblySelectionDAGInfo.cpp
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WebAssemblySelectionDAGInfo.h
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WebAssemblySetP2AlignOperands.cpp
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WebAssemblySubtarget.cpp
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WebAssemblySubtarget.h
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WebAssemblyTargetMachine.cpp
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WebAssemblyTargetMachine.h
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WebAssemblyTargetObjectFile.cpp
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WebAssemblyTargetObjectFile.h
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WebAssemblyTargetTransformInfo.cpp
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WebAssemblyTargetTransformInfo.h
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WebAssemblyUtilities.cpp
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WebAssemblyUtilities.h
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known_gcc_test_failures.txt
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Editing: WebAssemblyMemIntrinsicResults.cpp
//== WebAssemblyMemIntrinsicResults.cpp - Optimize memory intrinsic results ==// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// /// /// \file /// This file implements an optimization pass using memory intrinsic results. /// /// Calls to memory intrinsics (memcpy, memmove, memset) return the destination /// address. They are in the form of /// %dst_new = call @memcpy %dst, %src, %len /// where %dst and %dst_new registers contain the same value. /// /// This is to enable an optimization wherein uses of the %dst register used in /// the parameter can be replaced by uses of the %dst_new register used in the /// result, making the %dst register more likely to be single-use, thus more /// likely to be useful to register stackifying, and potentially also exposing /// the call instruction itself to register stackifying. These both can reduce /// local.get/local.set traffic. /// /// The LLVM intrinsics for these return void so they can't use the returned /// attribute and consequently aren't handled by the OptimizeReturned pass. /// //===----------------------------------------------------------------------===// #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" #include "WebAssembly.h" #include "WebAssemblyMachineFunctionInfo.h" #include "WebAssemblySubtarget.h" #include "llvm/Analysis/TargetLibraryInfo.h" #include "llvm/CodeGen/LiveIntervals.h" #include "llvm/CodeGen/MachineBlockFrequencyInfo.h" #include "llvm/CodeGen/MachineDominators.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/Passes.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" using namespace llvm; #define DEBUG_TYPE "wasm-mem-intrinsic-results" namespace { class WebAssemblyMemIntrinsicResults final : public MachineFunctionPass { public: static char ID; // Pass identification, replacement for typeid WebAssemblyMemIntrinsicResults() : MachineFunctionPass(ID) {} StringRef getPassName() const override { return "WebAssembly Memory Intrinsic Results"; } void getAnalysisUsage(AnalysisUsage &AU) const override { AU.setPreservesCFG(); AU.addRequired<MachineBlockFrequencyInfo>(); AU.addPreserved<MachineBlockFrequencyInfo>(); AU.addRequired<MachineDominatorTree>(); AU.addPreserved<MachineDominatorTree>(); AU.addRequired<LiveIntervals>(); AU.addPreserved<SlotIndexes>(); AU.addPreserved<LiveIntervals>(); AU.addRequired<TargetLibraryInfoWrapperPass>(); MachineFunctionPass::getAnalysisUsage(AU); } bool runOnMachineFunction(MachineFunction &MF) override; private: }; } // end anonymous namespace char WebAssemblyMemIntrinsicResults::ID = 0; INITIALIZE_PASS(WebAssemblyMemIntrinsicResults, DEBUG_TYPE, "Optimize memory intrinsic result values for WebAssembly", false, false) FunctionPass *llvm::createWebAssemblyMemIntrinsicResults() { return new WebAssemblyMemIntrinsicResults(); } // Replace uses of FromReg with ToReg if they are dominated by MI. static bool replaceDominatedUses(MachineBasicBlock &MBB, MachineInstr &MI, unsigned FromReg, unsigned ToReg, const MachineRegisterInfo &MRI, MachineDominatorTree &MDT, LiveIntervals &LIS) { bool Changed = false; LiveInterval *FromLI = &LIS.getInterval(FromReg); LiveInterval *ToLI = &LIS.getInterval(ToReg); SlotIndex FromIdx = LIS.getInstructionIndex(MI).getRegSlot(); VNInfo *FromVNI = FromLI->getVNInfoAt(FromIdx); SmallVector<SlotIndex, 4> Indices; for (auto I = MRI.use_nodbg_begin(FromReg), E = MRI.use_nodbg_end(); I != E;) { MachineOperand &O = *I++; MachineInstr *Where = O.getParent(); // Check that MI dominates the instruction in the normal way. if (&MI == Where || !MDT.dominates(&MI, Where)) continue; // If this use gets a different value, skip it. SlotIndex WhereIdx = LIS.getInstructionIndex(*Where); VNInfo *WhereVNI = FromLI->getVNInfoAt(WhereIdx); if (WhereVNI && WhereVNI != FromVNI) continue; // Make sure ToReg isn't clobbered before it gets there. VNInfo *ToVNI = ToLI->getVNInfoAt(WhereIdx); if (ToVNI && ToVNI != FromVNI) continue; Changed = true; LLVM_DEBUG(dbgs() << "Setting operand " << O << " in " << *Where << " from " << MI << "\n"); O.setReg(ToReg); // If the store's def was previously dead, it is no longer. if (!O.isUndef()) { MI.getOperand(0).setIsDead(false); Indices.push_back(WhereIdx.getRegSlot()); } } if (Changed) { // Extend ToReg's liveness. LIS.extendToIndices(*ToLI, Indices); // Shrink FromReg's liveness. LIS.shrinkToUses(FromLI); // If we replaced all dominated uses, FromReg is now killed at MI. if (!FromLI->liveAt(FromIdx.getDeadSlot())) MI.addRegisterKilled(FromReg, MBB.getParent() ->getSubtarget<WebAssemblySubtarget>() .getRegisterInfo()); } return Changed; } static bool optimizeCall(MachineBasicBlock &MBB, MachineInstr &MI, const MachineRegisterInfo &MRI, MachineDominatorTree &MDT, LiveIntervals &LIS, const WebAssemblyTargetLowering &TLI, const TargetLibraryInfo &LibInfo) { MachineOperand &Op1 = MI.getOperand(1); if (!Op1.isSymbol()) return false; StringRef Name(Op1.getSymbolName()); bool CallReturnsInput = Name == TLI.getLibcallName(RTLIB::MEMCPY) || Name == TLI.getLibcallName(RTLIB::MEMMOVE) || Name == TLI.getLibcallName(RTLIB::MEMSET); if (!CallReturnsInput) return false; LibFunc Func; if (!LibInfo.getLibFunc(Name, Func)) return false; Register FromReg = MI.getOperand(2).getReg(); Register ToReg = MI.getOperand(0).getReg(); if (MRI.getRegClass(FromReg) != MRI.getRegClass(ToReg)) report_fatal_error("Memory Intrinsic results: call to builtin function " "with wrong signature, from/to mismatch"); return replaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT, LIS); } bool WebAssemblyMemIntrinsicResults::runOnMachineFunction(MachineFunction &MF) { LLVM_DEBUG({ dbgs() << "********** Memory Intrinsic Results **********\n" << "********** Function: " << MF.getName() << '\n'; }); MachineRegisterInfo &MRI = MF.getRegInfo(); auto &MDT = getAnalysis<MachineDominatorTree>(); const WebAssemblyTargetLowering &TLI = *MF.getSubtarget<WebAssemblySubtarget>().getTargetLowering(); const auto &LibInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(MF.getFunction()); auto &LIS = getAnalysis<LiveIntervals>(); bool Changed = false; // We don't preserve SSA form. MRI.leaveSSA(); assert(MRI.tracksLiveness() && "MemIntrinsicResults expects liveness tracking"); for (auto &MBB : MF) { LLVM_DEBUG(dbgs() << "Basic Block: " << MBB.getName() << '\n'); for (auto &MI : MBB) switch (MI.getOpcode()) { default: break; case WebAssembly::CALL: Changed |= optimizeCall(MBB, MI, MRI, MDT, LIS, TLI, LibInfo); break; } } return Changed; }
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