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usr / src / contrib / llvm-project / llvm / lib / Target / WebAssembly /

📁 ..
📁 AsmParser
📁 Disassembler
📁 MCTargetDesc
📄 README.txt(8.34 KB)
📁 TargetInfo
📄 WebAssembly.h(4.05 KB)
📄 WebAssembly.td(4.85 KB)
📄 WebAssemblyAddMissingPrototypes.cpp(5.41 KB)
📄 WebAssemblyArgumentMove.cpp(3.36 KB)
📄 WebAssemblyAsmPrinter.cpp(16.09 KB)
📄 WebAssemblyAsmPrinter.h(3.12 KB)
📄 WebAssemblyCFGSort.cpp(15.94 KB)
📄 WebAssemblyCFGStackify.cpp(55.56 KB)
📄 WebAssemblyDebugFixup.cpp(5.4 KB)
📄 WebAssemblyDebugValueManager.cpp(1.77 KB)
📄 WebAssemblyDebugValueManager.h(1.13 KB)
📄 WebAssemblyExceptionInfo.cpp(6.23 KB)
📄 WebAssemblyExceptionInfo.h(6.24 KB)
📄 WebAssemblyExplicitLocals.cpp(15.04 KB)
📄 WebAssemblyFastISel.cpp(40.39 KB)
📄 WebAssemblyFixBrTableDefaults.cpp(5.81 KB)
📄 WebAssemblyFixFunctionBitcasts.cpp(12.59 KB)
📄 WebAssemblyFixIrreducibleControlFlow.cpp(18.91 KB)
📄 WebAssemblyFrameLowering.cpp(12.68 KB)
📄 WebAssemblyFrameLowering.h(2.98 KB)
📄 WebAssemblyISD.def(1.17 KB)
📄 WebAssemblyISelDAGToDAG.cpp(9.08 KB)
📄 WebAssemblyISelLowering.cpp(68.59 KB)
📄 WebAssemblyISelLowering.h(5.85 KB)
📄 WebAssemblyInstrAtomics.td(48.5 KB)
📄 WebAssemblyInstrBulkMemory.td(2.84 KB)
📄 WebAssemblyInstrCall.td(3.21 KB)
📄 WebAssemblyInstrControl.td(7.93 KB)
📄 WebAssemblyInstrConv.td(14.1 KB)
📄 WebAssemblyInstrFloat.td(6.03 KB)
📄 WebAssemblyInstrFormats.td(3.1 KB)
📄 WebAssemblyInstrInfo.cpp(8.21 KB)
📄 WebAssemblyInstrInfo.h(2.63 KB)
📄 WebAssemblyInstrInfo.td(14.37 KB)
📄 WebAssemblyInstrInteger.td(6.05 KB)
📄 WebAssemblyInstrMemory.td(18.63 KB)
📄 WebAssemblyInstrRef.td(1.15 KB)
📄 WebAssemblyInstrSIMD.td(39.08 KB)
📄 WebAssemblyLateEHPrepare.cpp(14.57 KB)
📄 WebAssemblyLowerBrUnless.cpp(6.21 KB)
📄 WebAssemblyLowerEmscriptenEHSjLj.cpp(45.45 KB)
📄 WebAssemblyLowerGlobalDtors.cpp(7.79 KB)
📄 WebAssemblyMCInstLower.cpp(13.72 KB)
📄 WebAssemblyMCInstLower.h(1.63 KB)
📄 WebAssemblyMachineFunctionInfo.cpp(4.29 KB)
📄 WebAssemblyMachineFunctionInfo.h(6.75 KB)
📄 WebAssemblyMemIntrinsicResults.cpp(7.39 KB)
📄 WebAssemblyOptimizeLiveIntervals.cpp(4.61 KB)
📄 WebAssemblyOptimizeReturned.cpp(2.46 KB)
📄 WebAssemblyPeephole.cpp(6.33 KB)
📄 WebAssemblyPrepareForLiveIntervals.cpp(4.34 KB)
📄 WebAssemblyRegColoring.cpp(6.37 KB)
📄 WebAssemblyRegNumbering.cpp(3.86 KB)
📄 WebAssemblyRegStackify.cpp(38.22 KB)
📄 WebAssemblyRegisterInfo.cpp(6.21 KB)
📄 WebAssemblyRegisterInfo.h(1.74 KB)
📄 WebAssemblyRegisterInfo.td(2.83 KB)
📄 WebAssemblyReplacePhysRegs.cpp(3.89 KB)
📄 WebAssemblyRuntimeLibcallSignatures.cpp(33.82 KB)
📄 WebAssemblyRuntimeLibcallSignatures.h(1.37 KB)
📄 WebAssemblySelectionDAGInfo.cpp(2.57 KB)
📄 WebAssemblySelectionDAGInfo.h(1.94 KB)
📄 WebAssemblySetP2AlignOperands.cpp(3.32 KB)
📄 WebAssemblySubtarget.cpp(2.18 KB)
📄 WebAssemblySubtarget.h(3.88 KB)
📄 WebAssemblyTargetMachine.cpp(18.85 KB)
📄 WebAssemblyTargetMachine.h(2.29 KB)
📄 WebAssemblyTargetObjectFile.cpp(886 B)
📄 WebAssemblyTargetObjectFile.h(959 B)
📄 WebAssemblyTargetTransformInfo.cpp(2.9 KB)
📄 WebAssemblyTargetTransformInfo.h(2.5 KB)
📄 WebAssemblyUtilities.cpp(3.43 KB)
📄 WebAssemblyUtilities.h(1.8 KB)
📄 known_gcc_test_failures.txt(2.07 KB)

Editing: WebAssemblyPrepareForLiveIntervals.cpp

//===- WebAssemblyPrepareForLiveIntervals.cpp - Prepare for LiveIntervals -===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// Fix up code to meet LiveInterval's requirements.
///
/// Some CodeGen passes don't preserve LiveInterval's requirements, because
/// they run after register allocation and it isn't important. However,
/// WebAssembly runs LiveIntervals in a late pass. This pass transforms code
/// to meet LiveIntervals' requirements; primarily, it ensures that all
/// virtual register uses have definitions (IMPLICIT_DEF definitions if
/// nothing else).
///
//===----------------------------------------------------------------------===//

#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "WebAssembly.h"
#include "WebAssemblyMachineFunctionInfo.h"
#include "WebAssemblySubtarget.h"
#include "WebAssemblyUtilities.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;

#define DEBUG_TYPE "wasm-prepare-for-live-intervals"

namespace {
class WebAssemblyPrepareForLiveIntervals final : public MachineFunctionPass {
public:
  static char ID; // Pass identification, replacement for typeid
  WebAssemblyPrepareForLiveIntervals() : MachineFunctionPass(ID) {}

private:
  StringRef getPassName() const override {
    return "WebAssembly Prepare For LiveIntervals";
  }

void getAnalysisUsage(AnalysisUsage &AU) const override {
    AU.setPreservesCFG();
    MachineFunctionPass::getAnalysisUsage(AU);
  }

bool runOnMachineFunction(MachineFunction &MF) override;
};
} // end anonymous namespace

char WebAssemblyPrepareForLiveIntervals::ID = 0;
INITIALIZE_PASS(WebAssemblyPrepareForLiveIntervals, DEBUG_TYPE,
                "Fix up code for LiveIntervals", false, false)

FunctionPass *llvm::createWebAssemblyPrepareForLiveIntervals() {
  return new WebAssemblyPrepareForLiveIntervals();
}

// Test whether the given register has an ARGUMENT def.
static bool hasArgumentDef(unsigned Reg, const MachineRegisterInfo &MRI) {
  for (const auto &Def : MRI.def_instructions(Reg))
    if (WebAssembly::isArgument(Def.getOpcode()))
      return true;
  return false;
}

bool WebAssemblyPrepareForLiveIntervals::runOnMachineFunction(
    MachineFunction &MF) {
  LLVM_DEBUG({
    dbgs() << "********** Prepare For LiveIntervals **********\n"
           << "********** Function: " << MF.getName() << '\n';
  });

bool Changed = false;
  MachineRegisterInfo &MRI = MF.getRegInfo();
  const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
  MachineBasicBlock &Entry = *MF.begin();

assert(!mustPreserveAnalysisID(LiveIntervalsID) &&
         "LiveIntervals shouldn't be active yet!");

// We don't preserve SSA form.
  MRI.leaveSSA();

// BranchFolding and perhaps other passes don't preserve IMPLICIT_DEF
  // instructions. LiveIntervals requires that all paths to virtual register
  // uses provide a definition. Insert IMPLICIT_DEFs in the entry block to
  // conservatively satisfy this.
  //
  // TODO: This is fairly heavy-handed; find a better approach.
  //
  for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I) {
    unsigned Reg = Register::index2VirtReg(I);

// Skip unused registers.
    if (MRI.use_nodbg_empty(Reg))
      continue;

// Skip registers that have an ARGUMENT definition.
    if (hasArgumentDef(Reg, MRI))
      continue;

BuildMI(Entry, Entry.begin(), DebugLoc(),
            TII.get(WebAssembly::IMPLICIT_DEF), Reg);
    Changed = true;
  }

// Move ARGUMENT_* instructions to the top of the entry block, so that their
  // liveness reflects the fact that these really are live-in values.
  for (auto MII = Entry.begin(), MIE = Entry.end(); MII != MIE;) {
    MachineInstr &MI = *MII++;
    if (WebAssembly::isArgument(MI.getOpcode())) {
      MI.removeFromParent();
      Entry.insert(Entry.begin(), &MI);
    }
  }

// Ok, we're now ready to run the LiveIntervals analysis again.
  MF.getProperties().set(MachineFunctionProperties::Property::TracksLiveness);

return Changed;
}

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Editing: WebAssemblyPrepareForLiveIntervals.cpp

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