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AsmParser
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Disassembler
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MCTargetDesc
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README.txt
(8.34 KB)
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TargetInfo
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WebAssembly.h
(4.05 KB)
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WebAssembly.td
(4.85 KB)
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WebAssemblyAddMissingPrototypes.cpp
(5.41 KB)
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WebAssemblyArgumentMove.cpp
(3.36 KB)
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WebAssemblyAsmPrinter.cpp
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WebAssemblyAsmPrinter.h
(3.12 KB)
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WebAssemblyCFGSort.cpp
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WebAssemblyCFGStackify.cpp
(55.56 KB)
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WebAssemblyDebugFixup.cpp
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WebAssemblyDebugValueManager.cpp
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WebAssemblyDebugValueManager.h
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WebAssemblyExceptionInfo.cpp
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WebAssemblyExceptionInfo.h
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WebAssemblyExplicitLocals.cpp
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WebAssemblyFastISel.cpp
(40.39 KB)
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WebAssemblyFixBrTableDefaults.cpp
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WebAssemblyFixFunctionBitcasts.cpp
(12.59 KB)
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WebAssemblyFixIrreducibleControlFlow.cpp
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WebAssemblyFrameLowering.cpp
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WebAssemblyFrameLowering.h
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WebAssemblyISD.def
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WebAssemblyISelDAGToDAG.cpp
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WebAssemblyISelLowering.cpp
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WebAssemblyISelLowering.h
(5.85 KB)
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WebAssemblyInstrAtomics.td
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WebAssemblyInstrBulkMemory.td
(2.84 KB)
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WebAssemblyInstrCall.td
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WebAssemblyInstrControl.td
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WebAssemblyInstrConv.td
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WebAssemblyInstrFloat.td
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WebAssemblyInstrFormats.td
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WebAssemblyInstrInfo.cpp
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WebAssemblyInstrInfo.h
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WebAssemblyInstrInfo.td
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WebAssemblyInstrInteger.td
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WebAssemblyInstrMemory.td
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WebAssemblyInstrRef.td
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WebAssemblyInstrSIMD.td
(39.08 KB)
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WebAssemblyLateEHPrepare.cpp
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WebAssemblyLowerBrUnless.cpp
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WebAssemblyLowerEmscriptenEHSjLj.cpp
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WebAssemblyLowerGlobalDtors.cpp
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WebAssemblyMCInstLower.cpp
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WebAssemblyMCInstLower.h
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WebAssemblyMachineFunctionInfo.cpp
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WebAssemblyMachineFunctionInfo.h
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WebAssemblyMemIntrinsicResults.cpp
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WebAssemblyOptimizeLiveIntervals.cpp
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WebAssemblyOptimizeReturned.cpp
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WebAssemblyPeephole.cpp
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WebAssemblyPrepareForLiveIntervals.cpp
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WebAssemblyRegColoring.cpp
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WebAssemblyRegNumbering.cpp
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WebAssemblyRegStackify.cpp
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WebAssemblyRegisterInfo.cpp
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WebAssemblyRegisterInfo.h
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WebAssemblyRegisterInfo.td
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WebAssemblyReplacePhysRegs.cpp
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WebAssemblyRuntimeLibcallSignatures.cpp
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WebAssemblyRuntimeLibcallSignatures.h
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WebAssemblySelectionDAGInfo.cpp
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WebAssemblySelectionDAGInfo.h
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WebAssemblySetP2AlignOperands.cpp
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WebAssemblySubtarget.cpp
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WebAssemblySubtarget.h
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WebAssemblyTargetMachine.cpp
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WebAssemblyTargetMachine.h
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WebAssemblyTargetObjectFile.cpp
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WebAssemblyTargetObjectFile.h
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WebAssemblyTargetTransformInfo.cpp
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WebAssemblyTargetTransformInfo.h
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WebAssemblyUtilities.cpp
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WebAssemblyUtilities.h
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known_gcc_test_failures.txt
(2.07 KB)
Editing: WebAssemblyRegisterInfo.td
//WebAssemblyRegisterInfo.td-Describe the WebAssembly Registers -*- tablegen -*- // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// /// /// \file /// This file describes the WebAssembly register classes and some nominal /// physical registers. /// //===----------------------------------------------------------------------===// class WebAssemblyReg<string n> : Register<n> { let Namespace = "WebAssembly"; } class WebAssemblyRegClass<list<ValueType> regTypes, int alignment, dag regList> : RegisterClass<"WebAssembly", regTypes, alignment, regList>; //===----------------------------------------------------------------------===// // Registers //===----------------------------------------------------------------------===// // Special registers used as the frame and stack pointer. // // WebAssembly may someday supports mixed 32-bit and 64-bit heaps in the same // application, which requires separate width FP and SP. def FP32 : WebAssemblyReg<"%FP32">; def FP64 : WebAssemblyReg<"%FP64">; def SP32 : WebAssemblyReg<"%SP32">; def SP64 : WebAssemblyReg<"%SP64">; // The register allocation framework requires register classes have at least // one register, so we define a few for the integer / floating point register // classes since we otherwise don't need a physical register in those classes. // These are also used a "types" in the generated assembly matcher. def I32_0 : WebAssemblyReg<"%i32.0">; def I64_0 : WebAssemblyReg<"%i64.0">; def F32_0 : WebAssemblyReg<"%f32.0">; def F64_0 : WebAssemblyReg<"%f64.0">; def V128_0: WebAssemblyReg<"%v128">; def EXNREF_0 : WebAssemblyReg<"%exnref.0">; // The value stack "register". This is an opaque entity which serves to order // uses and defs that must remain in LIFO order. def VALUE_STACK : WebAssemblyReg<"STACK">; // The incoming arguments "register". This is an opaque entity which serves to // order the ARGUMENT instructions that are emulating live-in registers and // must not be scheduled below other instructions. def ARGUMENTS : WebAssemblyReg<"ARGUMENTS">; //===----------------------------------------------------------------------===// // Register classes //===----------------------------------------------------------------------===// def I32 : WebAssemblyRegClass<[i32], 32, (add FP32, SP32, I32_0)>; def I64 : WebAssemblyRegClass<[i64], 64, (add FP64, SP64, I64_0)>; def F32 : WebAssemblyRegClass<[f32], 32, (add F32_0)>; def F64 : WebAssemblyRegClass<[f64], 64, (add F64_0)>; def V128 : WebAssemblyRegClass<[v4f32, v2f64, v2i64, v4i32, v16i8, v8i16], 128, (add V128_0)>; def EXNREF : WebAssemblyRegClass<[exnref], 0, (add EXNREF_0)>;
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