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..
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AsmParser
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Disassembler
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ImmutableGraph.h
(15.15 KB)
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MCTargetDesc
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TargetInfo
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X86.h
(7.41 KB)
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X86.td
(68.44 KB)
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X86AsmPrinter.cpp
(27.18 KB)
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X86AsmPrinter.h
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X86AvoidStoreForwardingBlocks.cpp
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X86AvoidTrailingCall.cpp
(4.91 KB)
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X86CallFrameOptimization.cpp
(23.07 KB)
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X86CallLowering.cpp
(17.62 KB)
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X86CallLowering.h
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X86CallingConv.cpp
(13.34 KB)
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X86CallingConv.h
(1.09 KB)
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X86CallingConv.td
(46.15 KB)
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X86CmovConversion.cpp
(34.07 KB)
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X86CondBrFolding.cpp
(18.4 KB)
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X86DiscriminateMemOps.cpp
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X86DomainReassignment.cpp
(25.87 KB)
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X86EvexToVex.cpp
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X86ExpandPseudo.cpp
(16.95 KB)
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X86FastISel.cpp
(139.28 KB)
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X86FixupBWInsts.cpp
(18.09 KB)
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X86FixupLEAs.cpp
(24.44 KB)
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X86FixupSetCC.cpp
(4.44 KB)
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X86FlagsCopyLowering.cpp
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X86FloatingPoint.cpp
(62.66 KB)
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X86FrameLowering.cpp
(138.71 KB)
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X86FrameLowering.h
(11.64 KB)
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X86GenRegisterBankInfo.def
(3.32 KB)
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X86ISelDAGToDAG.cpp
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X86ISelLowering.cpp
(1.94 MB)
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X86ISelLowering.h
(60.88 KB)
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X86IndirectBranchTracking.cpp
(6.17 KB)
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X86IndirectThunks.cpp
(9.78 KB)
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X86InsertPrefetch.cpp
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X86InsertWait.cpp
(4.47 KB)
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X86Instr3DNow.td
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X86InstrAMX.td
(5.6 KB)
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X86InstrAVX512.td
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X86InstrArithmetic.td
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X86InstrBuilder.h
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X86InstrCMovSetCC.td
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X86InstrCompiler.td
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X86InstrControl.td
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X86InstrExtension.td
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X86InstrFMA.td
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X86InstrFMA3Info.cpp
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X86InstrFMA3Info.h
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X86InstrFPStack.td
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X86InstrFoldTables.cpp
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X86InstrFoldTables.h
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X86InstrFormats.td
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X86InstrFragmentsSIMD.td
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X86InstrInfo.cpp
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X86InstrInfo.h
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X86InstrInfo.td
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X86InstrMMX.td
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X86InstrMPX.td
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X86InstrSGX.td
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X86InstrSSE.td
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X86InstrSVM.td
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X86InstrShiftRotate.td
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X86InstrSystem.td
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X86InstrTSX.td
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X86InstrVMX.td
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X86InstrVecCompiler.td
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X86InstrXOP.td
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X86InstructionSelector.cpp
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X86InterleavedAccess.cpp
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X86IntrinsicsInfo.h
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X86LegalizerInfo.cpp
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X86LegalizerInfo.h
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X86LoadValueInjectionLoadHardening.cpp
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X86LoadValueInjectionRetHardening.cpp
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X86MCInstLower.cpp
(96.53 KB)
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X86MachineFunctionInfo.cpp
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X86MachineFunctionInfo.h
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X86MacroFusion.cpp
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X86MacroFusion.h
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X86OptimizeLEAs.cpp
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X86PadShortFunction.cpp
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X86PartialReduction.cpp
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X86PfmCounters.td
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X86RegisterBankInfo.cpp
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X86RegisterBankInfo.h
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X86RegisterBanks.td
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X86RegisterInfo.cpp
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X86RegisterInfo.h
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X86RegisterInfo.td
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X86SchedBroadwell.td
(69.45 KB)
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X86SchedHaswell.td
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X86SchedPredicates.td
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X86SchedSandyBridge.td
(50 KB)
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X86SchedSkylakeClient.td
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X86SchedSkylakeServer.td
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X86Schedule.td
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X86ScheduleAtom.td
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X86ScheduleBdVer2.td
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X86ScheduleBtVer2.td
(46.98 KB)
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X86ScheduleSLM.td
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X86ScheduleZnver1.td
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X86ScheduleZnver2.td
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X86SelectionDAGInfo.cpp
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X86SelectionDAGInfo.h
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X86ShuffleDecodeConstantPool.cpp
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X86ShuffleDecodeConstantPool.h
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X86SpeculativeExecutionSideEffectSuppression.cpp
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X86SpeculativeLoadHardening.cpp
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X86Subtarget.cpp
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X86Subtarget.h
(32.08 KB)
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X86TargetMachine.cpp
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X86TargetMachine.h
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X86TargetObjectFile.cpp
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X86TargetObjectFile.h
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X86TargetTransformInfo.cpp
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X86TargetTransformInfo.h
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X86VZeroUpper.cpp
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X86WinAllocaExpander.cpp
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X86WinEHState.cpp
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Editing: X86IndirectBranchTracking.cpp
//===---- X86IndirectBranchTracking.cpp - Enables CET IBT mechanism -------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file defines a pass that enables Indirect Branch Tracking (IBT) as part // of Control-Flow Enforcement Technology (CET). // The pass adds ENDBR (End Branch) machine instructions at the beginning of // each basic block or function that is referenced by an indrect jump/call // instruction. // The ENDBR instructions have a NOP encoding and as such are ignored in // targets that do not support CET IBT mechanism. //===----------------------------------------------------------------------===// #include "X86.h" #include "X86InstrInfo.h" #include "X86Subtarget.h" #include "X86TargetMachine.h" #include "llvm/ADT/Statistic.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineModuleInfo.h" using namespace llvm; #define DEBUG_TYPE "x86-indirect-branch-tracking" static cl::opt<bool> IndirectBranchTracking( "x86-indirect-branch-tracking", cl::init(false), cl::Hidden, cl::desc("Enable X86 indirect branch tracking pass.")); STATISTIC(NumEndBranchAdded, "Number of ENDBR instructions added"); namespace { class X86IndirectBranchTrackingPass : public MachineFunctionPass { public: X86IndirectBranchTrackingPass() : MachineFunctionPass(ID) {} StringRef getPassName() const override { return "X86 Indirect Branch Tracking"; } bool runOnMachineFunction(MachineFunction &MF) override; private: static char ID; /// Machine instruction info used throughout the class. const X86InstrInfo *TII = nullptr; /// Endbr opcode for the current machine function. unsigned int EndbrOpcode = 0; /// Adds a new ENDBR instruction to the beginning of the MBB. /// The function will not add it if already exists. /// It will add ENDBR32 or ENDBR64 opcode, depending on the target. /// \returns true if the ENDBR was added and false otherwise. bool addENDBR(MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; }; } // end anonymous namespace char X86IndirectBranchTrackingPass::ID = 0; FunctionPass *llvm::createX86IndirectBranchTrackingPass() { return new X86IndirectBranchTrackingPass(); } bool X86IndirectBranchTrackingPass::addENDBR( MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { assert(TII && "Target instruction info was not initialized"); assert((X86::ENDBR64 == EndbrOpcode || X86::ENDBR32 == EndbrOpcode) && "Unexpected Endbr opcode"); // If the MBB/I is empty or the current instruction is not ENDBR, // insert ENDBR instruction to the location of I. if (I == MBB.end() || I->getOpcode() != EndbrOpcode) { BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(EndbrOpcode)); ++NumEndBranchAdded; return true; } return false; } static bool IsCallReturnTwice(llvm::MachineOperand &MOp) { if (!MOp.isGlobal()) return false; auto *CalleeFn = dyn_cast<Function>(MOp.getGlobal()); if (!CalleeFn) return false; AttributeList Attrs = CalleeFn->getAttributes(); return Attrs.hasFnAttribute(Attribute::ReturnsTwice); } bool X86IndirectBranchTrackingPass::runOnMachineFunction(MachineFunction &MF) { const X86Subtarget &SubTarget = MF.getSubtarget<X86Subtarget>(); // Check that the cf-protection-branch is enabled. Metadata *isCFProtectionSupported = MF.getMMI().getModule()->getModuleFlag("cf-protection-branch"); // NB: We need to enable IBT in jitted code if JIT compiler is CET // enabled. const X86TargetMachine *TM = static_cast<const X86TargetMachine *>(&MF.getTarget()); #ifdef __CET__ bool isJITwithCET = TM->isJIT(); #else bool isJITwithCET = false; #endif if (!isCFProtectionSupported && !IndirectBranchTracking && !isJITwithCET) return false; // True if the current MF was changed and false otherwise. bool Changed = false; TII = SubTarget.getInstrInfo(); EndbrOpcode = SubTarget.is64Bit() ? X86::ENDBR64 : X86::ENDBR32; // Large code model, non-internal function or function whose address // was taken, can be accessed through indirect calls. Mark the first // BB with ENDBR instruction unless nocf_check attribute is used. if ((TM->getCodeModel() == CodeModel::Large || MF.getFunction().hasAddressTaken() || !MF.getFunction().hasLocalLinkage()) && !MF.getFunction().doesNoCfCheck()) { auto MBB = MF.begin(); Changed |= addENDBR(*MBB, MBB->begin()); } for (auto &MBB : MF) { // Find all basic blocks that their address was taken (for example // in the case of indirect jump) and add ENDBR instruction. if (MBB.hasAddressTaken()) Changed |= addENDBR(MBB, MBB.begin()); for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I) { if (I->isCall() && IsCallReturnTwice(I->getOperand(0))) Changed |= addENDBR(MBB, std::next(I)); } // Exception handle may indirectly jump to catch pad, So we should add // ENDBR before catch pad instructions. For SjLj exception model, it will // create a new BB(new landingpad) indirectly jump to the old landingpad. if (TM->Options.ExceptionModel == ExceptionHandling::SjLj) { for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I) { // New Landingpad BB without EHLabel. if (MBB.isEHPad()) { if (I->isDebugInstr()) continue; Changed |= addENDBR(MBB, I); break; } else if (I->isEHLabel()) { // Old Landingpad BB (is not Landingpad now) with // the the old "callee" EHLabel. MCSymbol *Sym = I->getOperand(0).getMCSymbol(); if (!MF.hasCallSiteLandingPad(Sym)) continue; Changed |= addENDBR(MBB, std::next(I)); break; } } } else if (MBB.isEHPad()){ for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I) { if (!I->isEHLabel()) continue; Changed |= addENDBR(MBB, std::next(I)); break; } } } return Changed; }
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