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..
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AsmParser
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Disassembler
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ImmutableGraph.h
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MCTargetDesc
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TargetInfo
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X86.h
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X86.td
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X86AsmPrinter.cpp
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X86AsmPrinter.h
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X86AvoidStoreForwardingBlocks.cpp
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X86AvoidTrailingCall.cpp
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X86CallFrameOptimization.cpp
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X86CallLowering.cpp
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X86CallLowering.h
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X86CallingConv.cpp
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X86CallingConv.h
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X86CallingConv.td
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X86CmovConversion.cpp
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X86CondBrFolding.cpp
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X86DiscriminateMemOps.cpp
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X86DomainReassignment.cpp
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X86EvexToVex.cpp
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X86ExpandPseudo.cpp
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X86FastISel.cpp
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X86FixupBWInsts.cpp
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X86FixupLEAs.cpp
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X86FixupSetCC.cpp
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X86FlagsCopyLowering.cpp
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X86FloatingPoint.cpp
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X86FrameLowering.cpp
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X86FrameLowering.h
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X86GenRegisterBankInfo.def
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X86ISelDAGToDAG.cpp
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X86ISelLowering.cpp
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X86ISelLowering.h
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X86IndirectBranchTracking.cpp
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X86IndirectThunks.cpp
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X86InsertPrefetch.cpp
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X86InsertWait.cpp
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X86Instr3DNow.td
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X86InstrAMX.td
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X86InstrAVX512.td
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X86InstrArithmetic.td
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X86InstrBuilder.h
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X86InstrCMovSetCC.td
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X86InstrCompiler.td
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X86InstrControl.td
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X86InstrExtension.td
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X86InstrFMA.td
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X86InstrFMA3Info.cpp
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X86InstrFMA3Info.h
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X86InstrFPStack.td
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X86InstrFoldTables.cpp
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X86InstrFoldTables.h
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X86InstrFormats.td
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X86InstrFragmentsSIMD.td
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X86InstrInfo.cpp
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X86InstrInfo.h
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X86InstrInfo.td
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X86InstrMMX.td
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X86InstrMPX.td
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X86InstrSGX.td
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X86InstrSSE.td
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X86InstrSVM.td
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X86InstrShiftRotate.td
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X86InstrSystem.td
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X86InstrTSX.td
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X86InstrVMX.td
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X86InstrVecCompiler.td
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X86InstrXOP.td
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X86InstructionSelector.cpp
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X86InterleavedAccess.cpp
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X86IntrinsicsInfo.h
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X86LegalizerInfo.cpp
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X86LegalizerInfo.h
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X86LoadValueInjectionLoadHardening.cpp
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X86LoadValueInjectionRetHardening.cpp
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X86MCInstLower.cpp
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X86MachineFunctionInfo.cpp
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X86MachineFunctionInfo.h
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X86MacroFusion.cpp
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X86MacroFusion.h
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X86OptimizeLEAs.cpp
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X86PadShortFunction.cpp
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X86PartialReduction.cpp
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X86PfmCounters.td
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X86RegisterBankInfo.cpp
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X86RegisterBankInfo.h
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X86RegisterBanks.td
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X86RegisterInfo.cpp
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X86RegisterInfo.h
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X86RegisterInfo.td
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X86SchedBroadwell.td
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X86SchedHaswell.td
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X86SchedPredicates.td
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X86SchedSandyBridge.td
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X86SchedSkylakeClient.td
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X86SchedSkylakeServer.td
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X86Schedule.td
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X86ScheduleAtom.td
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X86ScheduleBdVer2.td
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X86ScheduleBtVer2.td
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X86ScheduleSLM.td
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X86ScheduleZnver1.td
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X86ScheduleZnver2.td
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X86SelectionDAGInfo.cpp
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X86SelectionDAGInfo.h
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X86ShuffleDecodeConstantPool.cpp
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X86ShuffleDecodeConstantPool.h
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X86SpeculativeExecutionSideEffectSuppression.cpp
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X86SpeculativeLoadHardening.cpp
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X86Subtarget.cpp
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X86Subtarget.h
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X86TargetMachine.cpp
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X86TargetMachine.h
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X86TargetObjectFile.cpp
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X86TargetObjectFile.h
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X86TargetTransformInfo.cpp
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X86TargetTransformInfo.h
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X86VZeroUpper.cpp
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X86WinAllocaExpander.cpp
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X86WinEHState.cpp
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Editing: X86InstrFoldTables.h
//===-- X86InstrFoldTables.h - X86 Instruction Folding Tables ---*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file contains the interface to query the X86 memory folding tables. // //===----------------------------------------------------------------------===// #ifndef LLVM_LIB_TARGET_X86_X86INSTRFOLDTABLES_H #define LLVM_LIB_TARGET_X86_X86INSTRFOLDTABLES_H #include <cstdint> namespace llvm { enum { // Select which memory operand is being unfolded. // (stored in bits 0 - 2) TB_INDEX_0 = 0, TB_INDEX_1 = 1, TB_INDEX_2 = 2, TB_INDEX_3 = 3, TB_INDEX_4 = 4, TB_INDEX_MASK = 0x7, // Do not insert the reverse map (MemOp -> RegOp) into the table. // This may be needed because there is a many -> one mapping. TB_NO_REVERSE = 1 << 3, // Do not insert the forward map (RegOp -> MemOp) into the table. // This is needed for Native Client, which prohibits branch // instructions from using a memory operand. TB_NO_FORWARD = 1 << 4, TB_FOLDED_LOAD = 1 << 5, TB_FOLDED_STORE = 1 << 6, TB_FOLDED_BCAST = 1 << 7, // Minimum alignment required for load/store. // Used for RegOp->MemOp conversion. Encoded as Log2(Align) + 1 to allow 0 // to mean align of 0. // (stored in bits 8 - 11) TB_ALIGN_SHIFT = 8, TB_ALIGN_NONE = 0 << TB_ALIGN_SHIFT, TB_ALIGN_16 = 5 << TB_ALIGN_SHIFT, TB_ALIGN_32 = 6 << TB_ALIGN_SHIFT, TB_ALIGN_64 = 7 << TB_ALIGN_SHIFT, TB_ALIGN_MASK = 0xf << TB_ALIGN_SHIFT, // Broadcast type. // (stored in bits 12 - 13) TB_BCAST_TYPE_SHIFT = 12, TB_BCAST_D = 0 << TB_BCAST_TYPE_SHIFT, TB_BCAST_Q = 1 << TB_BCAST_TYPE_SHIFT, TB_BCAST_SS = 2 << TB_BCAST_TYPE_SHIFT, TB_BCAST_SD = 3 << TB_BCAST_TYPE_SHIFT, TB_BCAST_MASK = 0x3 << TB_BCAST_TYPE_SHIFT, // Unused bits 14-15 }; // This struct is used for both the folding and unfold tables. They KeyOp // is used to determine the sorting order. struct X86MemoryFoldTableEntry { uint16_t KeyOp; uint16_t DstOp; uint16_t Flags; bool operator<(const X86MemoryFoldTableEntry &RHS) const { return KeyOp < RHS.KeyOp; } bool operator==(const X86MemoryFoldTableEntry &RHS) const { return KeyOp == RHS.KeyOp; } friend bool operator<(const X86MemoryFoldTableEntry &TE, unsigned Opcode) { return TE.KeyOp < Opcode; } }; // Look up the memory folding table entry for folding a load and a store into // operand 0. const X86MemoryFoldTableEntry *lookupTwoAddrFoldTable(unsigned RegOp); // Look up the memory folding table entry for folding a load or store with // operand OpNum. const X86MemoryFoldTableEntry *lookupFoldTable(unsigned RegOp, unsigned OpNum); // Look up the memory unfolding table entry for this instruction. const X86MemoryFoldTableEntry *lookupUnfoldTable(unsigned MemOp); } // namespace llvm #endif
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