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📁 Disassembler
📁 MCTargetDesc
📁 TargetInfo
📄 XCore.h(1.13 KB)
📄 XCore.td(1.7 KB)
📄 XCoreAsmPrinter.cpp(10.24 KB)
📄 XCoreCallingConv.td(1.62 KB)
📄 XCoreFrameLowering.cpp(24.02 KB)
📄 XCoreFrameLowering.h(2.35 KB)
📄 XCoreFrameToArgsOffsetElim.cpp(2.27 KB)
📄 XCoreISelDAGToDAG.cpp(10.31 KB)
📄 XCoreISelLowering.cpp(75.02 KB)
📄 XCoreISelLowering.h(8.8 KB)
📄 XCoreInstrFormats.td(8.66 KB)
📄 XCoreInstrInfo.cpp(15.16 KB)
📄 XCoreInstrInfo.h(4.02 KB)
📄 XCoreInstrInfo.td(50.2 KB)
📄 XCoreLowerThreadLocal.cpp(8.17 KB)
📄 XCoreMCInstLower.cpp(3.79 KB)
📄 XCoreMCInstLower.h(1.24 KB)
📄 XCoreMachineFunctionInfo.cpp(2.93 KB)
📄 XCoreMachineFunctionInfo.h(2.89 KB)
📄 XCoreRegisterInfo.cpp(10.28 KB)
📄 XCoreRegisterInfo.h(1.59 KB)
📄 XCoreRegisterInfo.td(1.88 KB)
📄 XCoreSelectionDAGInfo.cpp(2.03 KB)
📄 XCoreSelectionDAGInfo.h(1.18 KB)
📄 XCoreSubtarget.cpp(1.07 KB)
📄 XCoreSubtarget.h(2.1 KB)
📄 XCoreTargetMachine.cpp(3.53 KB)
📄 XCoreTargetMachine.h(1.81 KB)
📄 XCoreTargetObjectFile.cpp(6.47 KB)
📄 XCoreTargetObjectFile.h(1.42 KB)
📄 XCoreTargetStreamer.h(887 B)
📄 XCoreTargetTransformInfo.h(1.76 KB)

Editing: XCoreCallingConv.td

//===- XCoreCallingConv.td - Calling Conventions for XCore -*- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// This describes the calling conventions for XCore architecture.
//===----------------------------------------------------------------------===//

//===----------------------------------------------------------------------===//
// XCore Return Value Calling Convention
//===----------------------------------------------------------------------===//
def RetCC_XCore : CallingConv<[
  // i32 are returned in registers R0, R1, R2, R3
  CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,

// Integer values get stored in stack slots that are 4 bytes in
  // size and 4-byte aligned.
  CCIfType<[i32], CCAssignToStack<4, 4>>
]>;

//===----------------------------------------------------------------------===//
// XCore Argument Calling Conventions
//===----------------------------------------------------------------------===//
def CC_XCore : CallingConv<[
  // Promote i8/i16 arguments to i32.
  CCIfType<[i8, i16], CCPromoteToType<i32>>,

// The 'nest' parameter, if any, is passed in R11.
  CCIfNest<CCAssignToReg<[R11]>>,

// The first 4 integer arguments are passed in integer registers.
  CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,

// Integer values get stored in stack slots that are 4 bytes in
  // size and 4-byte aligned.
  CCIfType<[i32], CCAssignToStack<4, 4>>
]>;

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Editing: XCoreCallingConv.td

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