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AggressiveAntiDepBreaker.cpp
(37.23 KB)
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AggressiveAntiDepBreaker.h
(6.8 KB)
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AllocationOrder.cpp
(1.96 KB)
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AllocationOrder.h
(2.96 KB)
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Analysis.cpp
(32.62 KB)
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AsmPrinter
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AtomicExpandPass.cpp
(71.86 KB)
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BBSectionsPrepare.cpp
(18.8 KB)
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BasicTargetTransformInfo.cpp
(1.53 KB)
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BranchFolding.cpp
(77.92 KB)
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BranchFolding.h
(7.36 KB)
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BranchRelaxation.cpp
(19.45 KB)
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BreakFalseDeps.cpp
(9.79 KB)
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BuiltinGCs.cpp
(4.88 KB)
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CFGuardLongjmp.cpp
(3.73 KB)
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CFIInstrInserter.cpp
(17.53 KB)
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CalcSpillWeights.cpp
(10.22 KB)
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CallingConvLower.cpp
(10.4 KB)
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CodeGen.cpp
(5.28 KB)
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CodeGenPrepare.cpp
(295.01 KB)
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CommandFlags.cpp
(24.89 KB)
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CriticalAntiDepBreaker.cpp
(27.91 KB)
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CriticalAntiDepBreaker.h
(4.22 KB)
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DFAPacketizer.cpp
(10.91 KB)
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DeadMachineInstructionElim.cpp
(6.52 KB)
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DetectDeadLanes.cpp
(20.74 KB)
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DwarfEHPrepare.cpp
(9.01 KB)
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EarlyIfConversion.cpp
(37.51 KB)
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EdgeBundles.cpp
(3.21 KB)
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ExecutionDomainFix.cpp
(14.67 KB)
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ExpandMemCmp.cpp
(33.66 KB)
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ExpandPostRAPseudos.cpp
(7.28 KB)
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ExpandReductions.cpp
(7.23 KB)
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FEntryInserter.cpp
(1.81 KB)
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FaultMaps.cpp
(4.99 KB)
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FinalizeISel.cpp
(2.65 KB)
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FixupStatepointCallerSaved.cpp
(11.06 KB)
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FuncletLayout.cpp
(2.21 KB)
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GCMetadata.cpp
(5.1 KB)
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GCMetadataPrinter.cpp
(748 B)
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GCRootLowering.cpp
(11.46 KB)
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GCStrategy.cpp
(708 B)
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GlobalISel
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GlobalMerge.cpp
(24.52 KB)
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HardwareLoops.cpp
(18.44 KB)
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IfConversion.cpp
(89.43 KB)
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ImplicitNullChecks.cpp
(25.14 KB)
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IndirectBrExpandPass.cpp
(7.79 KB)
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InlineSpiller.cpp
(58.24 KB)
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InterferenceCache.cpp
(8.83 KB)
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InterferenceCache.h
(7.22 KB)
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InterleavedAccessPass.cpp
(16.59 KB)
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InterleavedLoadCombinePass.cpp
(42.35 KB)
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IntrinsicLowering.cpp
(17.08 KB)
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LLVMTargetMachine.cpp
(10.25 KB)
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LatencyPriorityQueue.cpp
(5.64 KB)
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LazyMachineBlockFrequencyInfo.cpp
(3.36 KB)
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LexicalScopes.cpp
(12.16 KB)
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LiveDebugValues.cpp
(78.98 KB)
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LiveDebugVariables.cpp
(51.79 KB)
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LiveDebugVariables.h
(2.15 KB)
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LiveInterval.cpp
(46.67 KB)
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LiveIntervalCalc.cpp
(7.62 KB)
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LiveIntervalUnion.cpp
(6.36 KB)
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LiveIntervals.cpp
(64.59 KB)
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LivePhysRegs.cpp
(11.08 KB)
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LiveRangeCalc.cpp
(15.72 KB)
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LiveRangeEdit.cpp
(17.03 KB)
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LiveRangeShrink.cpp
(8.69 KB)
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LiveRangeUtils.h
(2.12 KB)
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LiveRegMatrix.cpp
(7.47 KB)
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LiveRegUnits.cpp
(4.72 KB)
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LiveStacks.cpp
(2.95 KB)
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LiveVariables.cpp
(30.26 KB)
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LocalStackSlotAllocation.cpp
(17.26 KB)
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LoopTraversal.cpp
(2.89 KB)
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LowLevelType.cpp
(1.93 KB)
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LowerEmuTLS.cpp
(5.66 KB)
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MBFIWrapper.cpp
(1.57 KB)
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MIRCanonicalizerPass.cpp
(12.46 KB)
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MIRNamerPass.cpp
(2.16 KB)
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MIRParser
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MIRPrinter.cpp
(32.67 KB)
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MIRPrintingPass.cpp
(1.99 KB)
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MIRVRegNamerUtils.cpp
(6.04 KB)
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MIRVRegNamerUtils.h
(3.25 KB)
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MachineBasicBlock.cpp
(50.47 KB)
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MachineBlockFrequencyInfo.cpp
(10.13 KB)
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MachineBlockPlacement.cpp
(137.61 KB)
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MachineBranchProbabilityInfo.cpp
(3.5 KB)
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MachineCSE.cpp
(31.82 KB)
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MachineCombiner.cpp
(28.13 KB)
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MachineCopyPropagation.cpp
(29.21 KB)
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MachineDebugify.cpp
(6.47 KB)
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MachineDominanceFrontier.cpp
(1.83 KB)
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MachineDominators.cpp
(4.86 KB)
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MachineFrameInfo.cpp
(9.77 KB)
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MachineFunction.cpp
(42.97 KB)
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MachineFunctionPass.cpp
(4.78 KB)
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MachineFunctionPrinterPass.cpp
(2.3 KB)
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MachineInstr.cpp
(76.39 KB)
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MachineInstrBundle.cpp
(11.49 KB)
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MachineLICM.cpp
(57.05 KB)
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MachineLoopInfo.cpp
(4.98 KB)
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MachineLoopUtils.cpp
(5.16 KB)
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MachineModuleInfo.cpp
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MachineModuleInfoImpls.cpp
(1.5 KB)
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MachineOperand.cpp
(39.6 KB)
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MachineOptimizationRemarkEmitter.cpp
(3.29 KB)
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MachineOutliner.cpp
(42.13 KB)
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MachinePipeliner.cpp
(111.33 KB)
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MachinePostDominators.cpp
(2.42 KB)
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MachineRegionInfo.cpp
(4.75 KB)
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MachineRegisterInfo.cpp
(22.97 KB)
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MachineSSAUpdater.cpp
(12.99 KB)
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MachineScheduler.cpp
(136.89 KB)
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MachineSink.cpp
(51.94 KB)
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MachineSizeOpts.cpp
(8.76 KB)
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MachineStripDebug.cpp
(3.76 KB)
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MachineTraceMetrics.cpp
(49.58 KB)
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MachineVerifier.cpp
(107.98 KB)
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MacroFusion.cpp
(7.55 KB)
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ModuloSchedule.cpp
(85.09 KB)
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NonRelocatableStringpool.cpp
(1.65 KB)
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OptimizePHIs.cpp
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PHIElimination.cpp
(27.73 KB)
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PHIEliminationUtils.cpp
(2.56 KB)
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PHIEliminationUtils.h
(972 B)
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ParallelCG.cpp
(3.71 KB)
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PatchableFunction.cpp
(3.44 KB)
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PeepholeOptimizer.cpp
(78.41 KB)
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PostRAHazardRecognizer.cpp
(3.5 KB)
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PostRASchedulerList.cpp
(24.31 KB)
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PreISelIntrinsicLowering.cpp
(7.91 KB)
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ProcessImplicitDefs.cpp
(5.4 KB)
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PrologEpilogInserter.cpp
(50.45 KB)
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PseudoSourceValue.cpp
(4.71 KB)
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RDFGraph.cpp
(58.39 KB)
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RDFLiveness.cpp
(40.7 KB)
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RDFRegisters.cpp
(11.29 KB)
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ReachingDefAnalysis.cpp
(21.74 KB)
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RegAllocBase.cpp
(6.31 KB)
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RegAllocBase.h
(4.63 KB)
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RegAllocBasic.cpp
(11.33 KB)
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RegAllocFast.cpp
(45.78 KB)
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RegAllocGreedy.cpp
(123.32 KB)
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RegAllocPBQP.cpp
(33.14 KB)
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RegUsageInfoCollector.cpp
(7.39 KB)
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RegUsageInfoPropagate.cpp
(5.07 KB)
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RegisterClassInfo.cpp
(6.62 KB)
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RegisterCoalescer.cpp
(151.71 KB)
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RegisterCoalescer.h
(4.04 KB)
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RegisterPressure.cpp
(48.86 KB)
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RegisterScavenging.cpp
(27.48 KB)
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RegisterUsageInfo.cpp
(3.18 KB)
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RenameIndependentSubregs.cpp
(14.79 KB)
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ResetMachineFunctionPass.cpp
(3.48 KB)
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SafeStack.cpp
(34.12 KB)
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SafeStackLayout.cpp
(5.3 KB)
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SafeStackLayout.h
(2.41 KB)
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ScalarizeMaskedMemIntrin.cpp
(31.46 KB)
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ScheduleDAG.cpp
(21.34 KB)
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ScheduleDAGInstrs.cpp
(54.59 KB)
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ScheduleDAGPrinter.cpp
(3.21 KB)
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ScoreboardHazardRecognizer.cpp
(7.96 KB)
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SelectionDAG
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ShadowStackGCLowering.cpp
(14.16 KB)
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ShrinkWrap.cpp
(23.03 KB)
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SjLjEHPrepare.cpp
(18.93 KB)
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SlotIndexes.cpp
(9.35 KB)
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SpillPlacement.cpp
(12.58 KB)
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SpillPlacement.h
(6.67 KB)
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SplitKit.cpp
(66.39 KB)
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SplitKit.h
(23.7 KB)
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StackColoring.cpp
(49.03 KB)
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StackMapLivenessAnalysis.cpp
(6.16 KB)
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StackMaps.cpp
(19.74 KB)
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StackProtector.cpp
(22.94 KB)
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StackSlotColoring.cpp
(17.12 KB)
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SwiftErrorValueTracking.cpp
(11.37 KB)
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SwitchLoweringUtils.cpp
(18.33 KB)
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TailDuplication.cpp
(3.32 KB)
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TailDuplicator.cpp
(38.29 KB)
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TargetFrameLoweringImpl.cpp
(6.24 KB)
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TargetInstrInfo.cpp
(51.1 KB)
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TargetLoweringBase.cpp
(82.53 KB)
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TargetLoweringObjectFileImpl.cpp
(80.52 KB)
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TargetOptionsImpl.cpp
(2 KB)
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TargetPassConfig.cpp
(48.89 KB)
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TargetRegisterInfo.cpp
(19.15 KB)
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TargetSchedule.cpp
(13.16 KB)
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TargetSubtargetInfo.cpp
(1.89 KB)
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TwoAddressInstructionPass.cpp
(62.08 KB)
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TypePromotion.cpp
(32.46 KB)
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UnreachableBlockElim.cpp
(7.48 KB)
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ValueTypes.cpp
(19.87 KB)
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VirtRegMap.cpp
(21.4 KB)
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WasmEHPrepare.cpp
(17.48 KB)
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WinEHPrepare.cpp
(51.16 KB)
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XRayInstrumentation.cpp
(9.66 KB)
Editing: XRayInstrumentation.cpp
//===- XRayInstrumentation.cpp - Adds XRay instrumentation to functions. --===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file implements a MachineFunctionPass that inserts the appropriate // XRay instrumentation instructions. We look for XRay-specific attributes // on the function to determine whether we should insert the replacement // operations. // //===---------------------------------------------------------------------===// #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Triple.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineDominators.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineLoopInfo.h" #include "llvm/CodeGen/TargetInstrInfo.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/IR/Attributes.h" #include "llvm/IR/Function.h" #include "llvm/InitializePasses.h" #include "llvm/Pass.h" #include "llvm/Target/TargetMachine.h" using namespace llvm; namespace { struct InstrumentationOptions { // Whether to emit PATCHABLE_TAIL_CALL. bool HandleTailcall; // Whether to emit PATCHABLE_RET/PATCHABLE_FUNCTION_EXIT for all forms of // return, e.g. conditional return. bool HandleAllReturns; }; struct XRayInstrumentation : public MachineFunctionPass { static char ID; XRayInstrumentation() : MachineFunctionPass(ID) { initializeXRayInstrumentationPass(*PassRegistry::getPassRegistry()); } void getAnalysisUsage(AnalysisUsage &AU) const override { AU.setPreservesCFG(); AU.addPreserved<MachineLoopInfo>(); AU.addPreserved<MachineDominatorTree>(); MachineFunctionPass::getAnalysisUsage(AU); } bool runOnMachineFunction(MachineFunction &MF) override; private: // Replace the original RET instruction with the exit sled code ("patchable // ret" pseudo-instruction), so that at runtime XRay can replace the sled // with a code jumping to XRay trampoline, which calls the tracing handler // and, in the end, issues the RET instruction. // This is the approach to go on CPUs which have a single RET instruction, // like x86/x86_64. void replaceRetWithPatchableRet(MachineFunction &MF, const TargetInstrInfo *TII, InstrumentationOptions); // Prepend the original return instruction with the exit sled code ("patchable // function exit" pseudo-instruction), preserving the original return // instruction just after the exit sled code. // This is the approach to go on CPUs which have multiple options for the // return instruction, like ARM. For such CPUs we can't just jump into the // XRay trampoline and issue a single return instruction there. We rather // have to call the trampoline and return from it to the original return // instruction of the function being instrumented. void prependRetWithPatchableExit(MachineFunction &MF, const TargetInstrInfo *TII, InstrumentationOptions); }; } // end anonymous namespace void XRayInstrumentation::replaceRetWithPatchableRet( MachineFunction &MF, const TargetInstrInfo *TII, InstrumentationOptions op) { // We look for *all* terminators and returns, then replace those with // PATCHABLE_RET instructions. SmallVector<MachineInstr *, 4> Terminators; for (auto &MBB : MF) { for (auto &T : MBB.terminators()) { unsigned Opc = 0; if (T.isReturn() && (op.HandleAllReturns || T.getOpcode() == TII->getReturnOpcode())) { // Replace return instructions with: // PATCHABLE_RET <Opcode>, <Operand>... Opc = TargetOpcode::PATCHABLE_RET; } if (TII->isTailCall(T) && op.HandleTailcall) { // Treat the tail call as a return instruction, which has a // different-looking sled than the normal return case. Opc = TargetOpcode::PATCHABLE_TAIL_CALL; } if (Opc != 0) { auto MIB = BuildMI(MBB, T, T.getDebugLoc(), TII->get(Opc)) .addImm(T.getOpcode()); for (auto &MO : T.operands()) MIB.add(MO); Terminators.push_back(&T); if (T.shouldUpdateCallSiteInfo()) MF.eraseCallSiteInfo(&T); } } } for (auto &I : Terminators) I->eraseFromParent(); } void XRayInstrumentation::prependRetWithPatchableExit( MachineFunction &MF, const TargetInstrInfo *TII, InstrumentationOptions op) { for (auto &MBB : MF) for (auto &T : MBB.terminators()) { unsigned Opc = 0; if (T.isReturn() && (op.HandleAllReturns || T.getOpcode() == TII->getReturnOpcode())) { Opc = TargetOpcode::PATCHABLE_FUNCTION_EXIT; } if (TII->isTailCall(T) && op.HandleTailcall) { Opc = TargetOpcode::PATCHABLE_TAIL_CALL; } if (Opc != 0) { // Prepend the return instruction with PATCHABLE_FUNCTION_EXIT or // PATCHABLE_TAIL_CALL . BuildMI(MBB, T, T.getDebugLoc(), TII->get(Opc)); } } } bool XRayInstrumentation::runOnMachineFunction(MachineFunction &MF) { auto &F = MF.getFunction(); auto InstrAttr = F.getFnAttribute("function-instrument"); bool AlwaysInstrument = !InstrAttr.hasAttribute(Attribute::None) && InstrAttr.isStringAttribute() && InstrAttr.getValueAsString() == "xray-always"; auto ThresholdAttr = F.getFnAttribute("xray-instruction-threshold"); auto IgnoreLoopsAttr = F.getFnAttribute("xray-ignore-loops"); unsigned int XRayThreshold = 0; if (!AlwaysInstrument) { if (ThresholdAttr.hasAttribute(Attribute::None) || !ThresholdAttr.isStringAttribute()) return false; // XRay threshold attribute not found. if (ThresholdAttr.getValueAsString().getAsInteger(10, XRayThreshold)) return false; // Invalid value for threshold. bool IgnoreLoops = !IgnoreLoopsAttr.hasAttribute(Attribute::None); // Count the number of MachineInstr`s in MachineFunction int64_t MICount = 0; for (const auto &MBB : MF) MICount += MBB.size(); bool TooFewInstrs = MICount < XRayThreshold; if (!IgnoreLoops) { // Get MachineDominatorTree or compute it on the fly if it's unavailable auto *MDT = getAnalysisIfAvailable<MachineDominatorTree>(); MachineDominatorTree ComputedMDT; if (!MDT) { ComputedMDT.getBase().recalculate(MF); MDT = &ComputedMDT; } // Get MachineLoopInfo or compute it on the fly if it's unavailable auto *MLI = getAnalysisIfAvailable<MachineLoopInfo>(); MachineLoopInfo ComputedMLI; if (!MLI) { ComputedMLI.getBase().analyze(MDT->getBase()); MLI = &ComputedMLI; } // Check if we have a loop. // FIXME: Maybe make this smarter, and see whether the loops are dependent // on inputs or side-effects? if (MLI->empty() && TooFewInstrs) return false; // Function is too small and has no loops. } else if (TooFewInstrs) { // Function is too small return false; } } // We look for the first non-empty MachineBasicBlock, so that we can insert // the function instrumentation in the appropriate place. auto MBI = llvm::find_if( MF, [&](const MachineBasicBlock &MBB) { return !MBB.empty(); }); if (MBI == MF.end()) return false; // The function is empty. auto *TII = MF.getSubtarget().getInstrInfo(); auto &FirstMBB = *MBI; auto &FirstMI = *FirstMBB.begin(); if (!MF.getSubtarget().isXRaySupported()) { FirstMI.emitError("An attempt to perform XRay instrumentation for an" " unsupported target."); return false; } if (!F.hasFnAttribute("xray-skip-entry")) { // First, insert an PATCHABLE_FUNCTION_ENTER as the first instruction of the // MachineFunction. BuildMI(FirstMBB, FirstMI, FirstMI.getDebugLoc(), TII->get(TargetOpcode::PATCHABLE_FUNCTION_ENTER)); } if (!F.hasFnAttribute("xray-skip-exit")) { switch (MF.getTarget().getTargetTriple().getArch()) { case Triple::ArchType::arm: case Triple::ArchType::thumb: case Triple::ArchType::aarch64: case Triple::ArchType::mips: case Triple::ArchType::mipsel: case Triple::ArchType::mips64: case Triple::ArchType::mips64el: { // For the architectures which don't have a single return instruction InstrumentationOptions op; op.HandleTailcall = false; op.HandleAllReturns = true; prependRetWithPatchableExit(MF, TII, op); break; } case Triple::ArchType::ppc64le: { // PPC has conditional returns. Turn them into branch and plain returns. InstrumentationOptions op; op.HandleTailcall = false; op.HandleAllReturns = true; replaceRetWithPatchableRet(MF, TII, op); break; } default: { // For the architectures that have a single return instruction (such as // RETQ on x86_64). InstrumentationOptions op; op.HandleTailcall = true; op.HandleAllReturns = false; replaceRetWithPatchableRet(MF, TII, op); break; } } } return true; } char XRayInstrumentation::ID = 0; char &llvm::XRayInstrumentationID = XRayInstrumentation::ID; INITIALIZE_PASS_BEGIN(XRayInstrumentation, "xray-instrumentation", "Insert XRay ops", false, false) INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo) INITIALIZE_PASS_END(XRayInstrumentation, "xray-instrumentation", "Insert XRay ops", false, false)
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