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📄 acphy.c(6.8 KB)
📄 acphyreg.h(3.39 KB)
📄 amphy.c(5.68 KB)
📄 amphyreg.h(3.71 KB)
📄 atphy.c(9.06 KB)
📄 atphyreg.h(2.46 KB)
📄 axphy.c(4.27 KB)
📄 bmtphy.c(7.2 KB)
📄 bmtphyreg.h(7.51 KB)
📄 brgphy.c(32.55 KB)
📄 brgphyreg.h(18.76 KB)
📄 ciphy.c(9.45 KB)
📄 ciphyreg.h(16.78 KB)
📄 e1000phy.c(13.82 KB)
📄 e1000phyreg.h(13.79 KB)
📄 gentbi.c(7.33 KB)
📄 icsphy.c(6.76 KB)
📄 icsphyreg.h(4.99 KB)
📄 ip1000phy.c(8.88 KB)
📄 ip1000phyreg.h(6.73 KB)
📄 jmphy.c(8.38 KB)
📄 jmphyreg.h(4.07 KB)
📄 lxtphy.c(7.35 KB)
📄 lxtphyreg.h(3.64 KB)
📄 micphy.c(9.27 KB)
📄 mii.c(16.35 KB)
📄 mii.h(10.3 KB)
📄 mii_bitbang.c(4.46 KB)
📄 mii_bitbang.h(2.36 KB)
📄 mii_fdt.c(6.02 KB)
📄 mii_fdt.h(2.9 KB)
📄 mii_physubr.c(17.29 KB)
📄 miibus_if.m(533 B)
📄 miidevs(16.37 KB)
📄 miivar.h(9.61 KB)
📄 nsgphy.c(6.74 KB)
📄 nsgphyreg.h(3.43 KB)
📄 nsphy.c(9.02 KB)
📄 nsphyreg.h(4.39 KB)
📄 nsphyter.c(7.77 KB)
📄 nsphyterreg.h(8.3 KB)
📄 pnaphy.c(4.19 KB)
📄 qsphy.c(6.26 KB)
📄 qsphyreg.h(3.74 KB)
📄 rdcphy.c(5.91 KB)
📄 rdcphyreg.h(2.67 KB)
📄 rgephy.c(15.06 KB)
📄 rgephyreg.h(9.11 KB)
📄 rlphy.c(7.26 KB)
📄 rlswitch.c(11.82 KB)
📄 smcphy.c(6.26 KB)
📄 smscphy.c(5.49 KB)
📄 tdkphy.c(6.02 KB)
📄 tdkphyreg.h(2.67 KB)
📄 tiphy.h(2.61 KB)
📄 truephy.c(8.25 KB)
📄 truephyreg.h(2.63 KB)
📄 ukphy.c(4.79 KB)
📄 ukphy_subr.c(4.26 KB)
📄 vscphy.c(6.57 KB)
📄 xmphy.c(6.98 KB)
📄 xmphyreg.h(5.31 KB)

Editing: acphyreg.h

/*-
 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
 *
 * Copyright (c) 2001 Semen Ustimenko (semenu@FreeBSD.org)
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#ifndef _DEV_MII_ACPHYREG_H_
#define	_DEV_MII_ACPHYREG_H_

/*
 * Register definitions for the Altima Communications AC101
 */

#define	MII_ACPHY_POL		0x10	/* Polarity int level */

/* High byte is interrupt mask register */
#define	MII_ACPHY_INT		0x11	/* Interrupt control/status */
#define	AC_INT_ACOMP		0x0001	/* Autoneg complete */
#define	AC_INT_REM_FLT		0x0002	/* Remote fault */
#define	AC_INT_LINK_DOWN	0x0004	/* Link not OK */
#define	AC_INT_LP_ACK		0x0008	/* FLP ack recved */
#define	AC_INT_PD_FLT		0x0010	/* Parallel detect fault */
#define	AC_INT_PAGE_RECV	0x0020	/* New page recved */
#define	AC_INT_RX_ER		0x0040	/* RX_ER transitions high */
#define	AC_INT_JAB		0x0080	/* Jabber detected */

#define	MII_ACPHY_DIAG		0x12	/* Diagnostic */
#define	AC_DIAG_RX_LOCK		0x0100
#define	AC_DIAG_RX_PASS		0x0200
#define	AC_DIAG_SPEED		0x0400	/* Aneg speed result */
#define	AC_DIAG_DUPLEX		0x0800	/* Aneg duplex result */

#define	MII_ACPHY_PWRLOOP	0x13	/* Power/Loopback */
#define	MII_ACPHY_CBLMEAS	0x14	/* Cable meas. */

#define	MII_ACPHY_MCTL		0x15	/* Mode control */
#define	AC_MCTL_FX_SEL		0x0001	/* FX mode */
#define	AC_MCTL_BYP_PCS		0x0002	/* Bypass PCS */
#define	AC_MCTL_SCRMBL		0x0004	/* Data scrambling */
#define	AC_MCTL_REM_LOOP	0x0008	/* Remote loopback */
#define	AC_MCTL_DIS_WDT		0x0010	/* Disable watchdog timer */
#define	AC_MCTL_DIS_REC		0x0020	/* Disable recv error counter */
#define	AC_MCTL_REC_FULL	0x0040	/* Recv error counter full */
#define	AC_MCTL_FRC_FEF		0x0080	/* Force Far End Fault Insert. */
#define	AC_MCTL_DIS_FEF		0x0100	/* Disable FEF Insertion */
#define	AC_MCTL_LED_SEL		0x0200	/* Compat LED config */
#define	AC_MCTL_ALED_SEL	0x0400	/* ActLED RX&TX - RX only */
#define	AC_MCTL_10BT_SEL	0x0800	/* Enable 7-wire interface */
#define	AC_MCTL_DIS_JAB		0x1000	/* Disable jabber */
#define	AC_MCTL_FRC_LINK	0x2000	/* Force TX link up */
#define	AC_MCTL_DIS_NLP		0x4000	/* Disable NLP check */

#define	MII_ACPHY_REC		0x18	/* Recv error counter */

#endif /* _DEV_MII_ACPHYREG_H_ */

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Editing: acphyreg.h

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