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usr / src / sys / contrib / device-tree / Bindings / ata /

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📄 ahci-ceva.txt(2.59 KB)
📄 ahci-da850.txt(645 B)
📄 ahci-dm816.txt(790 B)
📄 ahci-fsl-qoriq.txt(768 B)
📄 ahci-mtk.txt(2.01 KB)
📄 ahci-platform.txt(2.42 KB)
📄 ahci-st.txt(1.2 KB)
📄 allwinner,sun4i-a10-ahci.yaml(928 B)
📄 allwinner,sun8i-r40-ahci.yaml(1.35 KB)
📄 apm-xgene.txt(2.23 KB)
📄 atmel-at91_cf.txt(534 B)
📄 brcm,sata-brcm.txt(1.1 KB)
📄 cavium-compact-flash.txt(911 B)
📄 cortina,gemini-sata-bridge.txt(2.01 KB)
📄 exynos-sata.txt(945 B)
📄 faraday,ftide010.yaml(1.97 KB)
📄 fsl-sata.txt(897 B)
📄 imx-pata.txt(389 B)
📄 imx-sata.txt(1.34 KB)
📄 marvell.txt(567 B)
📄 nvidia,tegra124-ahci.txt(1.46 KB)
📄 pata-arasan.txt(988 B)
📄 pata-common.yaml(1.39 KB)
📄 qcom-sata.txt(1.42 KB)
📄 renesas,rcar-sata.yaml(1.8 KB)
📄 sata-common.yaml(1.35 KB)
📄 sata_highbank.yaml(2.47 KB)

Editing: ahci-mtk.txt

MediaTek Serial ATA controller

Required properties:
 - compatible	   : Must be "mediatek,<chip>-ahci", "mediatek,mtk-ahci".
		     When using "mediatek,mtk-ahci" compatible strings, you
		     need SoC specific ones in addition, one of:
		     - "mediatek,mt7622-ahci"
 - reg		   : Physical base addresses and length of register sets.
 - interrupts	   : Interrupt associated with the SATA device.
 - interrupt-names : Associated name must be: "hostc".
 - clocks	   : A list of phandle and clock specifier pairs, one for each
		     entry in clock-names.
 - clock-names	   : Associated names must be: "ahb", "axi", "asic", "rbc", "pm".
 - phys		   : A phandle and PHY specifier pair for the PHY port.
 - phy-names	   : Associated name must be: "sata-phy".
 - ports-implemented : See ./ahci-platform.txt for details.

Optional properties:
 - power-domains   : A phandle and power domain specifier pair to the power
		     domain which is responsible for collapsing and restoring
		     power to the peripheral.
 - resets	   : Must contain an entry for each entry in reset-names.
		     See ../reset/reset.txt for details.
 - reset-names	   : Associated names must be: "axi", "sw", "reg".
 - mediatek,phy-mode : A phandle to the system controller, used to enable
		       SATA function.

Example:

sata: sata@1a200000 {
		compatible = "mediatek,mt7622-ahci",
			     "mediatek,mtk-ahci";
		reg = <0 0x1a200000 0 0x1100>;
		interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "hostc";
		clocks = <&pciesys CLK_SATA_AHB_EN>,
			 <&pciesys CLK_SATA_AXI_EN>,
			 <&pciesys CLK_SATA_ASIC_EN>,
			 <&pciesys CLK_SATA_RBC_EN>,
			 <&pciesys CLK_SATA_PM_EN>;
		clock-names = "ahb", "axi", "asic", "rbc", "pm";
		phys = <&u3port1 PHY_TYPE_SATA>;
		phy-names = "sata-phy";
		ports-implemented = <0x1>;
		power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
		resets = <&pciesys MT7622_SATA_AXI_BUS_RST>,
			 <&pciesys MT7622_SATA_PHY_SW_RST>,
			 <&pciesys MT7622_SATA_PHY_REG_RST>;
		reset-names = "axi", "sw", "reg";
		mediatek,phy-mode = <&pciesys>;
	};

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Editing: ahci-mtk.txt

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