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📄 ahci-ceva.txt(2.59 KB)
📄 ahci-da850.txt(645 B)
📄 ahci-dm816.txt(790 B)
📄 ahci-fsl-qoriq.txt(768 B)
📄 ahci-mtk.txt(2.01 KB)
📄 ahci-platform.txt(2.42 KB)
📄 ahci-st.txt(1.2 KB)
📄 allwinner,sun4i-a10-ahci.yaml(928 B)
📄 allwinner,sun8i-r40-ahci.yaml(1.35 KB)
📄 apm-xgene.txt(2.23 KB)
📄 atmel-at91_cf.txt(534 B)
📄 brcm,sata-brcm.txt(1.1 KB)
📄 cavium-compact-flash.txt(911 B)
📄 cortina,gemini-sata-bridge.txt(2.01 KB)
📄 exynos-sata.txt(945 B)
📄 faraday,ftide010.yaml(1.97 KB)
📄 fsl-sata.txt(897 B)
📄 imx-pata.txt(389 B)
📄 imx-sata.txt(1.34 KB)
📄 marvell.txt(567 B)
📄 nvidia,tegra124-ahci.txt(1.46 KB)
📄 pata-arasan.txt(988 B)
📄 pata-common.yaml(1.39 KB)
📄 qcom-sata.txt(1.42 KB)
📄 renesas,rcar-sata.yaml(1.8 KB)
📄 sata-common.yaml(1.35 KB)
📄 sata_highbank.yaml(2.47 KB)

Editing: ahci-st.txt

STMicroelectronics STi SATA controller

This binding describes a SATA device.

Required properties:
 - compatible	   : Must be "st,ahci"
 - reg		   : Physical base addresses and length of register sets
 - interrupts	   : Interrupt associated with the SATA device
 - interrupt-names :   Associated name must be; "hostc"
 - clocks	   : The phandle for the clock
 - clock-names	   :   Associated name must be; "ahci_clk"
 - phys		   : The phandle for the PHY port
 - phy-names	   :   Associated name must be; "ahci_phy"

Optional properties:
 - resets	   : The power-down, soft-reset and power-reset lines of SATA IP
 - reset-names	   :   Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"

Example:

/* Example for stih407 family silicon */
	sata0: sata@9b20000 {
		compatible	= "st,ahci";
		reg		= <0x9b20000 0x1000>;
		interrupts	= <GIC_SPI 159 IRQ_TYPE_NONE>;
		interrupt-names	= "hostc";
		phys		= <&phy_port0 PHY_TYPE_SATA>;
		phy-names	= "ahci_phy";
		resets		= <&powerdown STIH407_SATA0_POWERDOWN>,
				  <&softreset STIH407_SATA0_SOFTRESET>,
				  <&softreset STIH407_SATA0_PWR_SOFTRESET>;
		reset-names	= "pwr-dwn", "sw-rst", "pwr-rst";
		clocks		= <&clk_s_c0_flexgen CLK_ICN_REG>;
		clock-names	= "ahci_clk";
	};

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