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altera-fpga2sdram-bridge.txt
(353 B)
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altera-freeze-bridge.txt
(697 B)
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altera-hps2fpga-bridge.txt
(1.02 KB)
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altera-passive-serial.txt
(988 B)
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altera-pr-ip.txt
(276 B)
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altera-socfpga-a10-fpga-mgr.txt
(629 B)
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altera-socfpga-fpga-mgr.txt
(533 B)
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fpga-bridge.txt
(367 B)
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fpga-region.txt
(17.25 KB)
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intel-stratix10-soc-fpga-mgr.txt
(372 B)
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lattice-ice40-fpga-mgr.txt
(729 B)
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lattice-machxo2-spi.txt
(656 B)
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xilinx-pr-decoupler.txt
(1.12 KB)
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xilinx-slave-serial.txt
(1.62 KB)
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xilinx-zynq-fpga-mgr.txt
(560 B)
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xlnx,zynqmp-pcap-fpga.txt
(641 B)
Editing: altera-freeze-bridge.txt
Altera Freeze Bridge Controller Driver The Altera Freeze Bridge Controller manages one or more freeze bridges. The controller can freeze/disable the bridges which prevents signal changes from passing through the bridge. The controller can also unfreeze/enable the bridges which allows traffic to pass through the bridge normally. Required properties: - compatible : Should contain "altr,freeze-bridge-controller" - regs : base address and size for freeze bridge module See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings. Example: freeze-controller@100000450 { compatible = "altr,freeze-bridge-controller"; regs = <0x1000 0x10>; bridge-enable = <0>; };
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