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usr / src / sys / contrib / dev / ath / ath_hal / ar9300 /

📁 ..
📄 ar9300.h(73.54 KB)
📄 ar9300_aic.c(25.58 KB)
📄 ar9300_ani.c(49.8 KB)
📄 ar9300_aphrodite10.ini(59.29 KB)
📄 ar9300_attach.c(174.66 KB)
📄 ar9300_beacon.c(7.28 KB)
📄 ar9300_devid.h(3.01 KB)
📄 ar9300_eeprom.c(163.03 KB)
📄 ar9300_freebsd.c(28.11 KB)
📄 ar9300_freebsd.h(4 KB)
📄 ar9300_freebsd_inc.h(11.58 KB)
📄 ar9300_gpio.c(20.62 KB)
📄 ar9300_interrupts.c(26.58 KB)
📄 ar9300_jupiter10.ini(71.26 KB)
📄 ar9300_jupiter20.ini(77.96 KB)
📄 ar9300_keycache.c(21.45 KB)
📄 ar9300_mci.c(72.45 KB)
📄 ar9300_misc.c(137.4 KB)
📄 ar9300_osprey22.ini(103.16 KB)
📄 ar9300_osprey22_scoemu.ini(98.42 KB)
📄 ar9300_paprd.c(95.21 KB)
📄 ar9300_phy.c(46.46 KB)
📄 ar9300_power.c(52.81 KB)
📄 ar9300_radar.c(19.78 KB)
📄 ar9300_radio.c(9.69 KB)
📄 ar9300_raw_adc_capture.c(1.36 KB)
📄 ar9300_recv.c(9.57 KB)
📄 ar9300_recv_ds.c(7.81 KB)
📄 ar9300_reset.c(225.67 KB)
📄 ar9300_rtt.c(1020 B)
📄 ar9300_sim.c(804 B)
📄 ar9300_sim.h(871 B)
📄 ar9300_spectral.c(19.97 KB)
📄 ar9300_stub.c(7.26 KB)
📄 ar9300_stub.h(145 B)
📄 ar9300_stub_funcs.c(22.62 KB)
📄 ar9300_stub_funcs.h(12.75 KB)
📄 ar9300_timer.c(5.59 KB)
📄 ar9300_tx99_tgt.c(31.81 KB)
📄 ar9300_txbf.c(1017 B)
📄 ar9300_txbf.h(856 B)
📄 ar9300_txbf_cal.c(937 B)
📄 ar9300_xmit.c(32.01 KB)
📄 ar9300_xmit_ds.c(28.62 KB)
📄 ar9300desc.h(21.6 KB)
📄 ar9300eep.h(28.6 KB)
📄 ar9300paprd.h(1.72 KB)
📄 ar9300phy.h(94.99 KB)
📄 ar9300radar.h(1.83 KB)
📄 ar9300reg.h(153.77 KB)
📄 ar9300template_ap121.h(22.42 KB)
📄 ar9300template_aphrodite.h(22.17 KB)
📄 ar9300template_cus157.h(21.77 KB)
📄 ar9300template_generic.h(22.15 KB)
📄 ar9300template_hb112.h(22.49 KB)
📄 ar9300template_hb116.h(22.45 KB)
📄 ar9300template_osprey_k31.h(22.51 KB)
📄 ar9300template_wasp_2.h(21.97 KB)
📄 ar9300template_wasp_k31.h(21.93 KB)
📄 ar9300template_xb112.h(22.58 KB)
📄 ar9300template_xb113.h(22.4 KB)
📄 ar9330_11.ini(62.51 KB)
📄 ar9330_12.ini(58.84 KB)
📄 ar9340.ini(117.7 KB)
📄 ar9462_2p0_initvals.h(42.75 KB)
📄 ar9462_2p1_initvals.h(10.28 KB)
📄 ar9485.ini(63.9 KB)
📄 ar9485_1_1.ini(62.75 KB)
📄 ar953x.ini(46.38 KB)
📄 ar955x.ini(75.5 KB)
📄 ar9580.ini(109.06 KB)
📄 eeprom.diff(10.13 KB)
📄 osprey_reg_map.h(227.66 KB)
📄 osprey_reg_map_macro.h(3.91 MB)
📄 poseidon_reg_map_macro.h(213.28 KB)
📄 scorpion_reg_map.h(98.86 KB)
📄 scorpion_reg_map_macro.h(3.11 MB)
📄 sources(1.73 KB)
📄 wasp_reg_map.h(4.55 KB)

Editing: ar9300_timer.c

/*
 * Copyright (c) 2013 Qualcomm Atheros, Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
 * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
 * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
 * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
 * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
 * PERFORMANCE OF THIS SOFTWARE.
 */

#include "opt_ah.h"

#include "ah.h"
#include "ah_internal.h"

#include "ar9300/ar9300.h"
#include "ar9300/ar9300reg.h"
#include "ar9300/ar9300desc.h"

typedef struct gen_timer_configuation {
    u_int32_t   next_addr;
    u_int32_t   period_addr;
    u_int32_t   mode_addr;
    u_int32_t   mode_mask;
}  GEN_TIMER_CONFIGURATION;

#define AR_GEN_TIMERS2_CFG(num) \
    AR_GEN_TIMERS2_ ## num ## _NEXT, \
    AR_GEN_TIMERS2_ ## num ## _PERIOD, \
    AR_GEN_TIMERS2_MODE, \
    (1 << num)
static const GEN_TIMER_CONFIGURATION gen_timer_configuration[] =
{
    {AR_NEXT_NDP_TIMER, AR_NDP_PERIOD, AR_TIMER_MODE, 0x0080},
    {AR_NEXT_NDP_TIMER, AR_NDP_PERIOD, AR_TIMER_MODE, 0x0080},
    {AR_NEXT_NDP_TIMER, AR_NDP_PERIOD, AR_TIMER_MODE, 0x0080},
    {AR_NEXT_NDP_TIMER, AR_NDP_PERIOD, AR_TIMER_MODE, 0x0080},
    {AR_NEXT_NDP_TIMER, AR_NDP_PERIOD, AR_TIMER_MODE, 0x0080},
    {AR_NEXT_NDP_TIMER, AR_NDP_PERIOD, AR_TIMER_MODE, 0x0080},
    {AR_NEXT_NDP_TIMER, AR_NDP_PERIOD, AR_TIMER_MODE, 0x0080},
    {AR_NEXT_NDP_TIMER, AR_NDP_PERIOD, AR_TIMER_MODE, 0x0080},
    {AR_GEN_TIMERS2_CFG(0)},
    {AR_GEN_TIMERS2_CFG(1)},
    {AR_GEN_TIMERS2_CFG(2)},
    {AR_GEN_TIMERS2_CFG(3)},
    {AR_GEN_TIMERS2_CFG(4)},
    {AR_GEN_TIMERS2_CFG(5)},
    {AR_GEN_TIMERS2_CFG(6)},
    {AR_GEN_TIMERS2_CFG(7)}
};

#define AR_GENTMR_BIT(_index)   (1 << (_index))

int
ar9300_alloc_generic_timer(struct ath_hal *ah, HAL_GEN_TIMER_DOMAIN tsf)
{
    struct ath_hal_9300 *ahp = AH9300(ah);
    u_int32_t           i, mask;
    u_int32_t           avail_timer_start, avail_timer_end;

if (tsf == HAL_GEN_TIMER_TSF) {
        avail_timer_start = AR_FIRST_NDP_TIMER;
        avail_timer_end = AR_GEN_TIMER_BANK_1_LEN;
    } else {
        avail_timer_start = AR_GEN_TIMER_BANK_1_LEN;
        avail_timer_end = AR_NUM_GEN_TIMERS;
    }

/* Find the first availabe timer index */
    i = avail_timer_start;
    mask = ahp->ah_avail_gen_timers >> i;
    for ( ; mask && (i < avail_timer_end) ; mask >>= 1, i++ ) {
        if (mask & 0x1) {
            ahp->ah_avail_gen_timers &= ~(AR_GENTMR_BIT(i));

if ((tsf == HAL_GEN_TIMER_TSF2) && !ahp->ah_enable_tsf2) {
                ahp->ah_enable_tsf2 = AH_TRUE;
                ar9300_start_tsf2(ah);
            }
            return i;
        }
    }
    return -1;
}

void ar9300_start_tsf2(struct ath_hal *ah)
{
    struct ath_hal_9300 *ahp = AH9300(ah);

if (ahp->ah_enable_tsf2) {
        /* Delay might be needed after TSF2 reset */
        OS_REG_SET_BIT(ah, AR_DIRECT_CONNECT, AR_DC_AP_STA_EN);
        OS_REG_SET_BIT(ah, AR_RESET_TSF, AR_RESET_TSF2_ONCE);
    }
}

void
ar9300_free_generic_timer(struct ath_hal *ah, int index)
{
    struct ath_hal_9300 *ahp = AH9300(ah);

ar9300_stop_generic_timer(ah, index);
    ahp->ah_avail_gen_timers |= AR_GENTMR_BIT(index);
}

void
ar9300_start_generic_timer(
    struct ath_hal *ah,
    int index,
    u_int32_t timer_next,
    u_int32_t timer_period)
{
    if ((index < AR_FIRST_NDP_TIMER) || (index >= AR_NUM_GEN_TIMERS)) {
        return;
    }

/*
     * Program generic timer registers
     */
    OS_REG_WRITE(ah, gen_timer_configuration[index].next_addr, timer_next);
    OS_REG_WRITE(ah, gen_timer_configuration[index].period_addr, timer_period);
    OS_REG_SET_BIT(ah,
        gen_timer_configuration[index].mode_addr,
        gen_timer_configuration[index].mode_mask);

if (AR_SREV_JUPITER(ah) || AR_SREV_APHRODITE(ah)) {
        /*
         * Starting from Jupiter, each generic timer can select which tsf to
         * use. But we still follow the old rule, 0 - 7 use tsf and 8 - 15
         * use tsf2.
         */
        if ((index < AR_GEN_TIMER_BANK_1_LEN)) {
            OS_REG_CLR_BIT(ah, AR_MAC_PCU_GEN_TIMER_TSF_SEL, (1 << index));
        }
        else {
            OS_REG_SET_BIT(ah, AR_MAC_PCU_GEN_TIMER_TSF_SEL, (1 << index));
        }
    }

/* Enable both trigger and thresh interrupt masks */
    OS_REG_SET_BIT(ah, AR_IMR_S5,
                   (SM(AR_GENTMR_BIT(index), AR_IMR_S5_GENTIMER_THRESH) |
                    SM(AR_GENTMR_BIT(index), AR_IMR_S5_GENTIMER_TRIG)));
}

void
ar9300_stop_generic_timer(struct ath_hal *ah, int index)
{
    if ((index < AR_FIRST_NDP_TIMER) || (index >= AR_NUM_GEN_TIMERS)) {
        return;
    }

/*
     * Clear generic timer enable bits.
     */
    OS_REG_CLR_BIT(ah,
        gen_timer_configuration[index].mode_addr,
        gen_timer_configuration[index].mode_mask);

/* Disable both trigger and thresh interrupt masks */
    OS_REG_CLR_BIT(ah, AR_IMR_S5,
                   (SM(AR_GENTMR_BIT(index), AR_IMR_S5_GENTIMER_THRESH) |
                    SM(AR_GENTMR_BIT(index), AR_IMR_S5_GENTIMER_TRIG)));
}

void
ar9300_get_gen_timer_interrupts(
    struct ath_hal *ah,
    u_int32_t *trigger,
    u_int32_t *thresh)
{
    struct ath_hal_9300 *ahp = AH9300(ah);
    *trigger = ahp->ah_intr_gen_timer_trigger;
    *thresh = ahp->ah_intr_gen_timer_thresh;
}

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Editing: ar9300_timer.c

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