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📄 armada-371x.dtsi(370 B)
📄 armada-3720-db.dts(4.35 KB)
📄 armada-3720-espressobin-emmc.dts(973 B)
📄 armada-3720-espressobin-v7-emmc.dts(1.16 KB)
📄 armada-3720-espressobin-v7.dts(772 B)
📄 armada-3720-espressobin.dts(511 B)
📄 armada-3720-espressobin.dtsi(2.98 KB)
📄 armada-3720-turris-mox.dts(14.09 KB)
📄 armada-3720-uDPU.dts(3.59 KB)
📄 armada-372x.dtsi(538 B)
📄 armada-37xx.dtsi(11.97 KB)
📄 armada-7020.dtsi(392 B)
📄 armada-7040-db.dts(5.57 KB)
📄 armada-7040.dtsi(735 B)
📄 armada-70x0.dtsi(1.18 KB)
📄 armada-8020.dtsi(689 B)
📄 armada-8040-clearfog-gt-8k.dts(9.07 KB)
📄 armada-8040-db.dts(5.98 KB)
📄 armada-8040-mcbin-singleshot.dts(653 B)
📄 armada-8040-mcbin.dts(876 B)
📄 armada-8040-mcbin.dtsi(7.67 KB)
📄 armada-8040.dtsi(1.13 KB)
📄 armada-8080-db.dts(562 B)
📄 armada-8080.dtsi(357 B)
📄 armada-80x0.dtsi(2.27 KB)
📄 armada-ap806-dual.dtsi(1.27 KB)
📄 armada-ap806-quad.dtsi(2.05 KB)
📄 armada-ap806.dtsi(557 B)
📄 armada-ap807-quad.dtsi(2.05 KB)
📄 armada-ap807.dtsi(529 B)
📄 armada-ap80x.dtsi(10.32 KB)
📄 armada-ap810-ap0-octa-core.dtsi(1.28 KB)
📄 armada-ap810-ap0.dtsi(2.8 KB)
📄 armada-common.dtsi(406 B)
📄 armada-cp110.dtsi(229 B)
📄 armada-cp115.dtsi(229 B)
📄 armada-cp11x.dtsi(15.04 KB)
📄 cn9130-db.dts(7.9 KB)
📄 cn9130.dtsi(898 B)
📄 cn9131-db.dts(4.15 KB)
📄 cn9132-db.dts(4.61 KB)

Editing: armada-ap807-quad.dtsi

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Marvell Armada AP807 Quad
 *
 * Copyright (C) 2019 Marvell Technology Group Ltd.
 */

#include "armada-ap807.dtsi"

/ {
	model = "Marvell Armada AP807 Quad";
	compatible = "marvell,armada-ap807-quad", "marvell,armada-ap807";

cpus {
		#address-cells = <1>;
		#size-cells = <0>;

cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x000>;
			enable-method = "psci";
			#cooling-cells = <2>;
			clocks = <&cpu_clk 0>;
			i-cache-size = <0xc000>;
			i-cache-line-size = <64>;
			i-cache-sets = <256>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <64>;
			d-cache-sets = <256>;
			next-level-cache = <&l2_0>;
		};
		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x001>;
			enable-method = "psci";
			#cooling-cells = <2>;
			clocks = <&cpu_clk 0>;
			i-cache-size = <0xc000>;
			i-cache-line-size = <64>;
			i-cache-sets = <256>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <64>;
			d-cache-sets = <256>;
			next-level-cache = <&l2_0>;
		};
		cpu2: cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x100>;
			enable-method = "psci";
			#cooling-cells = <2>;
			clocks = <&cpu_clk 1>;
			i-cache-size = <0xc000>;
			i-cache-line-size = <64>;
			i-cache-sets = <256>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <64>;
			d-cache-sets = <256>;
			next-level-cache = <&l2_1>;
		};
		cpu3: cpu@101 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x101>;
			enable-method = "psci";
			#cooling-cells = <2>;
			clocks = <&cpu_clk 1>;
			i-cache-size = <0xc000>;
			i-cache-line-size = <64>;
			i-cache-sets = <256>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <64>;
			d-cache-sets = <256>;
			next-level-cache = <&l2_1>;
		};

l2_0: l2-cache0 {
			compatible = "cache";
			cache-size = <0x80000>;
			cache-line-size = <64>;
			cache-sets = <512>;
		};

l2_1: l2-cache1 {
			compatible = "cache";
			cache-size = <0x80000>;
			cache-line-size = <64>;
			cache-sets = <512>;
		};
	};
};

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Editing: armada-ap807-quad.dtsi

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